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[23.128.96.18]) by mx.google.com with ESMTP id ca17si343537ejb.533.2020.07.08.10.48.50; Wed, 08 Jul 2020 10:49:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@cerno.tech header.s=fm3 header.b=CJ4D1tZM; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=gC6OIWuW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=cerno.tech Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726425AbgGHRrT (ORCPT + 99 others); Wed, 8 Jul 2020 13:47:19 -0400 Received: from wnew4-smtp.messagingengine.com ([64.147.123.18]:48929 "EHLO wnew4-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726823AbgGHRnK (ORCPT ); Wed, 8 Jul 2020 13:43:10 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailnew.west.internal (Postfix) with ESMTP id 2747B2F3; Wed, 8 Jul 2020 13:43:09 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Wed, 08 Jul 2020 13:43:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=7LPK87dqKcyIS 7piXBp22WH1e0PljQiexcrFqlswqVc=; b=CJ4D1tZMtX9ki8jFo0TEWgM3bjwH4 qGttCQzLGh0oPhJ6IDvH63LbzoVtPmtyr3m/mhueQNwnowHmH5uIQQiul1bBbwVU de9tw6nK5RafK9q0zmLMVgvrieiUAOhRfMaO/nKlOcLRxtuuP03oxbRO1NEo1rRQ MlSrLA7oVbM3a/18l2ITuwqiD0hZniEx6KsPWsbm+PbCOIaLNveEIfqstBLObjIB 0onjDJGIlx6hOcUt4GxNw2UN1kzo36wnps73MMK13FTg0Q4ME41aolhICPRweAdR VHZW02S/BAJB7L/g3qUAV0PTJlagRE044SovImX5In1hGbl7fYfne/e8w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=7LPK87dqKcyIS7piXBp22WH1e0PljQiexcrFqlswqVc=; b=gC6OIWuW ATsJd1Svd1oHB4uAhEXq63tOwviL/7BRYoDiC2J9/IA3ahKpkezJFyazo+8QY21w LX2AjhT5u9RIYkWs/FsEjaxBjt1A7BDigBsUKGK0cEZl7U6gZA2p+kIprUYalmub zgzSJaG0Mpf2TZ2i7vV+C9LmTwRic2YzngeRvZkZfMhQNBtTGcWCnBQhSZ6JsRi+ 4DzZDIOHPrlvdudY6w6+ivwaFQSXlBRq4tRKmQ8Uj/m7L4idxCyzIeQNtMiNrpcn tjNjE/Q3aBCfktGX322j62dwXjFnLwokRsk2QTCLUginr+6JwDLfDx6efhsIeRwy LoredBVzEkAQCg== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduiedrudejgdduudejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeforgigihhm vgcutfhiphgrrhguuceomhgrgihimhgvsegtvghrnhhordhtvggthheqnecuggftrfgrth htvghrnhepvdekleevfeffkeejhfffueelteelfeduieefheduudfggffhhfffheevveeh hedvnecukfhppeeltddrkeelrdeikedrjeeinecuvehluhhsthgvrhfuihiivgepvdegne curfgrrhgrmhepmhgrihhlfhhrohhmpehmrgigihhmvgestggvrhhnohdrthgvtghh X-ME-Proxy: Received: from localhost (lfbn-tou-1-1502-76.w90-89.abo.wanadoo.fr [90.89.68.76]) by mail.messagingengine.com (Postfix) with ESMTPA id 65749328005E; Wed, 8 Jul 2020 13:43:08 -0400 (EDT) From: Maxime Ripard To: Nicolas Saenz Julienne , Eric Anholt Cc: dri-devel@lists.freedesktop.org, linux-rpi-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Dave Stevenson , Tim Gover , Phil Elwell , Maxime Ripard Subject: [PATCH v4 26/78] drm/vc4: crtc: Remove redundant pixelvalve reset Date: Wed, 8 Jul 2020 19:41:34 +0200 Message-Id: <35c955e88914f4d22f5bfba5b060489850b764ba.1594230107.git-series.maxime@cerno.tech> X-Mailer: git-send-email 2.26.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since we moved the pixelvalve configuration to atomic_enable, we're now first calling the function that resets the pixelvalve and then the one that configures it. However, the first thing the latter is doing is calling the reset function, meaning that we reset twice our pixelvalve. Let's remove the first call. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_crtc.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 2eda2e6429ec..2c5ff45dc315 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -427,7 +427,6 @@ static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, require_hvs_enabled(dev); - vc4_crtc_pixelvalve_reset(crtc); vc4_crtc_config_pv(crtc); CRTC_WRITE(PV_CONTROL, CRTC_READ(PV_CONTROL) | PV_CONTROL_EN); -- git-series 0.9.1