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From:   "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date:   Wed, 8 Jul 2020 19:07:24 +0100
Message-ID: <CA+V-a8ssT==SsVRgbM1kwP4U3-f6=1h4es547isTvANpydwi4g@mail.gmail.com>
Subject: Re: [PATCH 6/8] arm64: dts: renesas: Initial r8a774e1 SoC device tree
To:     Marc Zyngier <maz@kernel.org>
Cc:     Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        Magnus Damm <magnus.damm@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Jason Cooper <jason@lakedaemon.net>,
        Ulf Hansson <ulf.hansson@linaro.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        Linux MMC List <linux-mmc@vger.kernel.org>,
        "open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
        LAK <linux-arm-kernel@lists.infradead.org>,
        LKML <linux-kernel@vger.kernel.org>
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Hi Marc,

Thank you for the review.

On Wed, Jul 8, 2020 at 6:53 PM Marc Zyngier <maz@kernel.org> wrote:
>
> On 2020-07-08 18:48, Lad Prabhakar wrote:
> > From: Marian-Cristian Rotariu
> > <marian-cristian.rotariu.rb@bp.renesas.com>
> >
> > Basic support for the RZ/G2H SoC.
> >
> > Signed-off-by: Marian-Cristian Rotariu
> > <marian-cristian.rotariu.rb@bp.renesas.com>
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> >  arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 652 ++++++++++++++++++++++
> >  1 file changed, 652 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> > b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> > new file mode 100644
> > index 000000000000..6637e157ffcd
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
>
> [...]
> > +             gic: interrupt-controller@f1010000 {
> > +                     compatible = "arm,gic-400";
> > +                     #interrupt-cells = <3>;
> > +                     #address-cells = <0>;
> > +                     interrupt-controller;
> > +                     reg = <0x0 0xf1010000 0 0x1000>,
> > +                           <0x0 0xf1020000 0 0x20000>,
> > +                           <0x0 0xf1040000 0 0x20000>,
> > +                           <0x0 0xf1060000 0 0x20000>;
> > +                     interrupts = <GIC_PPI 9
> > +                                     (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
>
> You seem to have a bit more than only 2 CPUs in this system.
>
Argh should be 8.

Cheers,
--Prabhakar

> > +                     clocks = <&cpg CPG_MOD 408>;
> > +                     clock-names = "clk";
> > +                     power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
> > +                     resets = <&cpg 408>;
> > +             };
>
>          M.
> --
> Jazz is not dead. It just smells funny...