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Subject: Re: [PATCH v3 13/14] [DO NOT MERGE] arm64: dts: allwinner: h6: Add
 GPU OPP table
From:   Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
In-Reply-To: <20200709140322.131320-14-peron.clem@gmail.com>
Date:   Fri, 10 Jul 2020 15:45:40 +0200
Cc:     Rob Herring <robh@kernel.org>,
        Tomeu Vizoso <tomeu.vizoso@collabora.com>,
        Steven Price <steven.price@arm.com>,
        Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>,
        Viresh Kumar <vireshk@kernel.org>, Nishanth Menon <nm@ti.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Maxime Ripard <mripard@kernel.org>,
        "wens@csie.org" <wens@csie.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        dri-devel@lists.freedesktop.org
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References: <20200709140322.131320-1-peron.clem@gmail.com>
 <20200709140322.131320-14-peron.clem@gmail.com>
To:     =?utf-8?B?Q2zDqW1lbnQgUMOpcm9u?= <peron.clem@gmail.com>
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> Wiadomo=C5=9B=C4=87 napisana przez Cl=C3=A9ment P=C3=A9ron =
<peron.clem@gmail.com> w dniu 09.07.2020, o godz. 16:03:
>=20
> Add an Operating Performance Points table for the GPU to
> enable Dynamic Voltage & Frequency Scaling on the H6.
>=20
> The voltage range is set with minival voltage set to the target
> and the maximal voltage set to 1.2V. This allow DVFS framework to
> work properly on board with fixed regulator.
>=20
> Signed-off-by: Cl=C3=A9ment P=C3=A9ron <peron.clem@gmail.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 80 ++++++++++++++++++++
> 1 file changed, 80 insertions(+)
>=20
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi =
b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 8f514a2169aa..a69f9e09a829 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -174,6 +174,7 @@ gpu: gpu@1800000 {
> 			clocks =3D <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
> 			clock-names =3D "core", "bus";
> 			resets =3D <&ccu RST_BUS_GPU>;
> +			operating-points-v2 =3D <&gpu_opp_table>;
> 			#cooling-cells =3D <2>;
> 			status =3D "disabled";
> 		};
> @@ -1036,4 +1037,83 @@ map0 {
> 			};
> 		};
> 	};
> +
> +	gpu_opp_table: gpu-opp-table {
> +		compatible =3D "operating-points-v2";
> +
> +		opp@216000000 {
> +			opp-hz =3D /bits/ 64 <216000000>;
> +			opp-microvolt =3D <810000 810000 1200000>;
> +		};
> +
> +		opp@264000000 {
> +			opp-hz =3D /bits/ 64 <264000000>;
> +			opp-microvolt =3D <810000 810000 1200000>;
> +		};
> +
> +		opp@312000000 {
> +			opp-hz =3D /bits/ 64 <312000000>;
> +			opp-microvolt =3D <810000 810000 1200000>;
> +		};
> +
> +		opp@336000000 {
> +			opp-hz =3D /bits/ 64 <336000000>;
> +			opp-microvolt =3D <810000 810000 1200000>;
> +		};
> +
> +		opp@360000000 {
> +			opp-hz =3D /bits/ 64 <360000000>;
> +			opp-microvolt =3D <820000 820000 1200000>;
> +		};
> +
> +		opp@384000000 {
> +			opp-hz =3D /bits/ 64 <384000000>;
> +			opp-microvolt =3D <830000 830000 1200000>;
> +		};
> +
> +		opp@408000000 {
> +			opp-hz =3D /bits/ 64 <408000000>;
> +			opp-microvolt =3D <840000 840000 1200000>;
> +		};
> +
> +		opp@420000000 {
> +			opp-hz =3D /bits/ 64 <420000000>;
> +			opp-microvolt =3D <850000 850000 1200000>;
> +		};
> +
> +		opp@432000000 {
> +			opp-hz =3D /bits/ 64 <432000000>;
> +			opp-microvolt =3D <860000 860000 1200000>;
> +		};
> +
> +		opp@456000000 {
> +			opp-hz =3D /bits/ 64 <456000000>;
> +			opp-microvolt =3D <870000 870000 1200000>;
> +		};
> +
> +		opp@504000000 {
> +			opp-hz =3D /bits/ 64 <504000000>;
> +			opp-microvolt =3D <890000 890000 1200000>;
> +		};
> +
> +		opp@540000000 {
> +			opp-hz =3D /bits/ 64 <540000000>;
> +			opp-microvolt =3D <910000 910000 1200000>;
> +		};
> +
> +		opp@576000000 {
> +			opp-hz =3D /bits/ 64 <576000000>;
> +			opp-microvolt =3D <930000 930000 1200000>;
> +		};
> +
> +		opp@624000000 {
> +			opp-hz =3D /bits/ 64 <624000000>;
> +			opp-microvolt =3D <950000 950000 1200000>;
> +		};
> +
> +		opp@756000000 {
> +			opp-hz =3D /bits/ 64 <756000000>;
> +			opp-microvolt =3D <1040000 1040000 1200000>;
> +		};
> +	};
> };

Clement,

I gave run for v3 on H6 GS1 TVbox and what i discovered:=20

1. I have frequent hard hangs if DVFS is enabled (hard reset required),

2. hangs seems to be related to operating points changing - as limiting =
OPP table to any single entry (tested on 5 highest OPP ) makes my GS1 =
stable working,

3. hang seems to be exactly related to OPP changes as having OPP table =
even with just 2 entries already gives hangs,

4. tunings with <regulator-ramp-delay> makes no difference (tested with =
0, 2500 and 25000). Also increasing <regulator-enable-ramp-delay> 2 =
times up (to 64000) makes no change.

Now I have 2 hypothesis:=20

a. issue is SW related: software operations in DVFS are somehow "unsafe" =
at touching hardware (is it possible we have i.e. concurrency issue =
here?);=20

b. issue is HW related: i.e. in steep-up OPP, time between sending =
change Vdd-gpu command to HW for increasing Vdd and sending command to =
HW for increasing GPU freq is too short.

To investigate further I done following test: limit OPP table to 4 =
entries+all 4 entries have the same Vdd.=20

If this test will pass the we know issue is b\.=20
If it will fail - then issue is a\.=20

And on my GS1 this test fails....so for me issue is a\ likely=E2=80=A6.

let me know how i can help!

br=