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a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1594409119; bh=Dsl+3s7kxr7SMHNDGo4LHQjuAXbCM0wy7MBqQM85g1I=; h=X-PGP-Universal:ARC-Seal:ARC-Message-Signature: ARC-Authentication-Results:Authentication-Results:Date:From:To:CC: Subject:Message-ID:References:Content-Type:Content-Disposition: In-Reply-To:X-ClientProxiedBy:MIME-Version: X-MS-Exchange-MessageSentRepresentingType:X-Originating-IP: X-MS-PublicTrafficType:X-MS-Office365-Filtering-Correlation-Id: X-MS-TrafficTypeDiagnostic:X-MS-Exchange-Transport-Forked: X-Microsoft-Antispam-PRVS:X-MS-Oob-TLC-OOBClassifiers: X-MS-Exchange-SenderADCheck:X-Microsoft-Antispam: X-Microsoft-Antispam-Message-Info:X-Forefront-Antispam-Report: X-MS-Exchange-AntiSpam-MessageData: X-MS-Exchange-CrossTenant-Network-Message-Id: X-MS-Exchange-CrossTenant-AuthSource: X-MS-Exchange-CrossTenant-AuthAs: X-MS-Exchange-CrossTenant-OriginalArrivalTime: X-MS-Exchange-CrossTenant-FromEntityHeader: X-MS-Exchange-CrossTenant-Id:X-MS-Exchange-CrossTenant-MailboxType: X-MS-Exchange-CrossTenant-UserPrincipalName: X-MS-Exchange-Transport-CrossTenantHeadersStamped:X-OriginatorOrg; b=F2cDmiZtLmH9W++upqh2NucKtPkjA5uv6T8/zJuGaGPvrBsjlahofAXHrAENe7eaY g6Y0HULgjxF1shyI6IFcKrQFFglrq5js11q53Zh0hN6oJux23A6+gR1HQDNVTyiH49 GetNPIwrKLtd9ra1/MHNOsLpdfW4yMAxJ1EIeQS2ZJr4IXOR1UZbetfr+YpNW9Hq1U 4kWykxxX/pyJq+YTMfJDPEslAcxMUbt8WZLlYgTM9EcQwMjz0q48U8TIiEyzVCsJFY BuH6SBMi1aaGBDmD+uGpgi9JvKQ2M+SpA86biCIiIAXz0kKFHXMerdKbK1VniJ58UY Sg3UrcvvKoNWg== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 01, 2020 at 03:53:47PM -0700, Ralph Campbell wrote: > The goal for this series is to introduce the hmm_pfn_to_map_order() > function. This allows a device driver to know that a given 4K PFN is > actually mapped by the CPU using a larger sized CPU page table entry and > therefore the device driver can safely map system memory using larger > device MMU PTEs. > The series is based on 5.8.0-rc3 and is intended for Jason Gunthorpe's > hmm tree. These were originally part of a larger series: > https://lore.kernel.org/linux-mm/20200619215649.32297-1-rcampbell@nvidia.com/ > > Changes in v3: > Replaced the HMM_PFN_P[MU]D flags with hmm_pfn_to_map_order() to > indicate the size of the CPU mapping. > > Changes in v2: > Make the hmm_range_fault() API changes into a separate series and add > two output flags for PMD/PUD instead of a single compund page flag as > suggested by Jason Gunthorpe. > Make the nouveau page table changes a separate patch as suggested by > Ben Skeggs. > Only add support for 2MB nouveau mappings initially since changing the > 1:1 CPU/GPU page table size assumptions requires a bigger set of changes. > Rebase to 5.8.0-rc3. > > Ralph Campbell (5): > nouveau/hmm: fault one page at a time > mm/hmm: add hmm_mapping order > nouveau: fix mapping 2MB sysmem pages > nouveau/hmm: support mapping large sysmem pages > hmm: add tests for HMM_PFN_PMD flag Applied to hmm.git. I edited the comment for hmm_pfn_to_map_order() and added a function to compute the field. Thanks, Jason