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[84.0.113.134]) by smtp.gmail.com with ESMTPSA id l18sm12170281wrm.52.2020.07.10.15.20.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jul 2020 15:20:16 -0700 (PDT) From: Saheed Olayemi Bolarinwa To: helgaas@kernel.org Cc: Bolarinwa Olayemi Saheed , bjorn@helgaas.com, skhan@linuxfoundation.org, linux-pci@vger.kernel.org, linux-kernel-mentees@lists.linuxfoundation.org, linux-kernel@vger.kernel.org Subject: [PATCH 7/14 v3] PCI: pciehp: Check the return value of pcie_capability_read_*() Date: Fri, 10 Jul 2020 23:20:19 +0200 Message-Id: <20200710212026.27136-8-refactormyself@gmail.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20200710212026.27136-1-refactormyself@gmail.com> References: <20200710212026.27136-1-refactormyself@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bolarinwa Olayemi Saheed If pcie_capability_read_word() fail, slot_ctrl will be 0 and the switch expression evaluates to 0. So *status = 1 "ON". However, with Patch 14/14 it is possible that slot_ctrl is set to ~0 on failure. This would introduce a bug because (x & x) == (~0 & x), so the switch expression evaluates to PCI_EXP_SLTCTL_PCC. This means that on failure *status = 1 "OFF", since PCI_EXP_SLTCTL_PCC = PCI_EXP_SLTCTL_PWR_OFF. Use an if-statement and include a check on the return value of pcie_capability_read_word() to confirm success or failure. Suggested-by: Bjorn Helgaas Signed-off-by: Bolarinwa Olayemi Saheed --- drivers/pci/hotplug/pciehp_hpc.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index b89c9ee4a3b5..f5ef3fbace69 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -394,20 +394,16 @@ void pciehp_get_power_status(struct controller *ctrl, u8 *status) { struct pci_dev *pdev = ctrl_dev(ctrl); u16 slot_ctrl; + int ret; - pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); + *status = 1; /* On */ + ret = pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__, pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); - switch (slot_ctrl & PCI_EXP_SLTCTL_PCC) { - case PCI_EXP_SLTCTL_PWR_OFF: + if (!ret && + ((slot_ctrl & PCI_EXP_SLTCTL_PCC) == PCI_EXP_SLTCTL_PWR_OFF)) *status = 0; /* Off */ - break; - case PCI_EXP_SLTCTL_PWR_ON: - default: - *status = 1; /* On */ - break; - } } void pciehp_get_latch_status(struct controller *ctrl, u8 *status) -- 2.18.2