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[84.0.113.134]) by smtp.gmail.com with ESMTPSA id n9sm11806540edr.46.2020.07.13.06.23.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 06:23:06 -0700 (PDT) From: "Saheed O. Bolarinwa" To: helgaas@kernel.org, Guan Xuetao Cc: "Saheed O. Bolarinwa" , bjorn@helgaas.com, skhan@linuxfoundation.org, linux-pci@vger.kernel.org, linux-kernel-mentees@lists.linuxfoundation.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 22/35] unicore32: Change PCIBIOS_SUCCESSFUL to 0 Date: Mon, 13 Jul 2020 14:22:34 +0200 Message-Id: <20200713122247.10985-23-refactormyself@gmail.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20200713122247.10985-1-refactormyself@gmail.com> References: <20200713122247.10985-1-refactormyself@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept. Their scope should be limited within arch/x86. Change all PCIBIOS_SUCCESSFUL to 0 Signed-off-by: "Saheed O. Bolarinwa" --- arch/unicore32/kernel/pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c index 0d098aa05b47..401ab356c814 100644 --- a/arch/unicore32/kernel/pci.c +++ b/arch/unicore32/kernel/pci.c @@ -37,7 +37,7 @@ puv3_read_config(struct pci_bus *bus, unsigned int devfn, int where, *value = readl(PCICFG_DATA); break; } - return PCIBIOS_SUCCESSFUL; + return 0; } static int @@ -58,7 +58,7 @@ puv3_write_config(struct pci_bus *bus, unsigned int devfn, int where, writel(value, PCICFG_DATA); break; } - return PCIBIOS_SUCCESSFUL; + return 0; } struct pci_ops pci_puv3_ops = { -- 2.18.2