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[84.0.113.134]) by smtp.gmail.com with ESMTPSA id n9sm11806540edr.46.2020.07.13.06.23.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 06:23:16 -0700 (PDT) From: "Saheed O. Bolarinwa" To: helgaas@kernel.org, Michal Simek Cc: "Saheed O. Bolarinwa" , bjorn@helgaas.com, skhan@linuxfoundation.org, linux-pci@vger.kernel.org, linux-kernel-mentees@lists.linuxfoundation.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 30/35] microblaze: Change PCIBIOS_SUCCESSFUL to 0 Date: Mon, 13 Jul 2020 14:22:42 +0200 Message-Id: <20200713122247.10985-31-refactormyself@gmail.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20200713122247.10985-1-refactormyself@gmail.com> References: <20200713122247.10985-1-refactormyself@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept. Their scope should be limited within arch/x86. Change all PCIBIOS_SUCCESSFUL to 0 Signed-off-by: "Saheed O. Bolarinwa" --- arch/microblaze/pci/indirect_pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/microblaze/pci/indirect_pci.c b/arch/microblaze/pci/indirect_pci.c index 1caf7d3e0eef..1f04a1f2c30b 100644 --- a/arch/microblaze/pci/indirect_pci.c +++ b/arch/microblaze/pci/indirect_pci.c @@ -65,7 +65,7 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, *val = in_le32(cfg_data); break; } - return PCIBIOS_SUCCESSFUL; + return 0; } static int @@ -132,7 +132,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, break; } - return PCIBIOS_SUCCESSFUL; + return 0; } static struct pci_ops indirect_pci_ops = { -- 2.18.2