Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
From:   Alexandre Bailon <abailon@baylibre.com>
To:     ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org,
        matthias.bgg@gmail.com
Cc:     linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
        Alexandre Bailon <abailon@baylibre.com>
Subject: [PATCH 1/6] dt bindings: remoteproc: Add bindings for MT8183 APU
Date:   Mon, 13 Jul 2020 15:29:22 +0200
Message-Id: <20200713132927.24925-2-abailon@baylibre.com>
In-Reply-To: <20200713132927.24925-1-abailon@baylibre.com>
References: <20200713132927.24925-1-abailon@baylibre.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

This adds dt bindings for the APU present in the MT8183.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
---
 .../bindings/remoteproc/mtk,apu.yaml          | 121 ++++++++++++++++++
 1 file changed, 121 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml
new file mode 100644
index 000000000000..1d5fcc135617
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml
@@ -0,0 +1,121 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+
+---
+$id: "http://devicetree.org/schemas/remoteproc/mtk,apu.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: MT8183 Vision Processor Unit (VPU) devices
+
+description:
+  This document defines the binding for the APU, a co-processor that could
+  offload the CPU for machine learning and neural network.
+
+maintainers:
+  - Alexandre Bailon <abailon@bayLibre.com>
+
+properties:
+  compatible:
+    const: mediatek,mt8183-apu
+
+  reg:
+    description:
+      Address ranges of the APU MMIO.
+    maxItems: 1
+
+  interrupts:
+    description:
+      The interrupt number used to receive the interrupts from the DSP.
+    maxItems: 1
+
+  clocks:
+    description:
+      "Clocks for co-processor (See: ../clock/clock-bindings.txt)
+      Three clocks are expected for AXI, IPU and JTAG.
+      The JTAG clock seems to be required to run the DSP,
+      even when JTAG is not in use."
+    maxItems: 3
+  clock-names:
+    description:
+      The name of clocks, must be ipu, axi and jtag
+    items:
+      - const: ipu
+      - const: axi
+      - const: jtag
+
+  iommu:
+    description: "IOMMU (See: ../iommu/iommu.txt)"
+    maxItems: 3
+
+  memory-region:
+    description: "Reserved memory (See: ../reserved-memory/reserved-memory.txt)"
+    maxItems: 1
+
+  power-domains:
+    description: "Power domain (see: ../power/power_domain.txt)"
+    maxItems: 1
+
+  pinctrl:
+    description: pinctrl handles, required to configure pins for JTAG.
+    maxItems: 2
+
+  pinctrl-names:
+    description:
+      pinctrl name, must be "default", "jtag".
+      "default" must configure the pins when JTAG is disabled.
+      "jtag" must configure the pins for JTAG operations.
+    items:
+      - const: default
+      - const: jtag
+    maxItems: 2
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - iommu
+  - memory-region
+  - power-domains
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt8183-clk.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/memory/mt8183-larb-port.h>
+    #include <dt-bindings/power/mt8183-power.h>
+
+    reserved-memory {
+      #address-cells = <1>;
+      #size-cells = <1>;
+      ranges;
+
+      vpu_ram: vpu_ram@0x60000000 {
+        compatible = "shared-dma-pool";
+        reg = <0 0x60000000 0 0x040000000>;
+        no-map;
+        linux,cma-default;
+      };
+    };
+
+    vpu0: vpu@0x19100000 {
+      compatible = "mediatek,mt8183-apu";
+      reg = <0 0x19180000 0 0x14000>;
+      reg-names = "mmio";
+      interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_LOW>;
+
+      iommus = <&iommu M4U_PORT_IMG_IPUO>,
+         <&iommu M4U_PORT_IMG_IPU3O>,
+         <&iommu M4U_PORT_IMG_IPUI>;
+
+      clocks = <&ipu_core0 CLK_IPU_CORE0_AXI>,
+         <&ipu_core0 CLK_IPU_CORE0_IPU>,
+         <&ipu_core0 CLK_IPU_CORE0_JTAG>;
+
+      clock-names = "axi", "ipu", "jtag";
+
+      power-domains = <&scpsys MT8183_POWER_DOMAIN_VPU_CORE0>;
+      memory-region = <&vpu_ram>;
+    };
+...
-- 
2.26.2