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[84.0.113.134]) by smtp.gmail.com with ESMTPSA id w3sm11838938edq.65.2020.07.13.09.55.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 09:55:10 -0700 (PDT) From: "Saheed O. Bolarinwa" To: skhan@linuxfoundation.org, linux-rdma@vger.kernel.org, linux-kernel-mentees@lists.linuxfoundation.org, linux-kernel@vger.kernel.org Cc: Bolarinwa Olayemi Saheed Subject: [PATCH 1/14 v3] IB/hfi1: Check the return value of pcie_capability_read_*() Date: Mon, 13 Jul 2020 19:55:25 +0200 Message-Id: <20200713175529.29715-1-refactormyself@gmail.com> X-Mailer: git-send-email 2.18.2 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bolarinwa Olayemi Saheed On failure pcie_capability_read_dword() sets it's last parameter, val to 0. In this case dn and up will be 0, so aspm_hw_l1_supported() will return false. However, with Patch 14/14, it is possible that val is set to ~0 on failure. This would introduce a bug because (x & x) == (~0 & x). So with dn and up being 0x02, a true value is return when the read has actually failed. This bug can be avoided if the return value of pcie_capability_read_dword is checked to confirm success. The behaviour of the function remains intact. Check the return value of pcie_capability_read_dword() to ensure success. Suggested-by: Bjorn Helgaas Signed-off-by: Bolarinwa Olayemi Saheed --- drivers/infiniband/hw/hfi1/aspm.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/infiniband/hw/hfi1/aspm.c b/drivers/infiniband/hw/hfi1/aspm.c index a3c53be4072c..80d0b3edd983 100644 --- a/drivers/infiniband/hw/hfi1/aspm.c +++ b/drivers/infiniband/hw/hfi1/aspm.c @@ -24,6 +24,7 @@ static bool aspm_hw_l1_supported(struct hfi1_devdata *dd) { struct pci_dev *parent = dd->pcidev->bus->self; u32 up, dn; + int ret_up, ret_dn; /* * If the driver does not have access to the upstream component, @@ -32,14 +33,14 @@ static bool aspm_hw_l1_supported(struct hfi1_devdata *dd) if (!parent) return false; - pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn); + ret_dn = pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn); dn = ASPM_L1_SUPPORTED(dn); - pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up); + ret_up = pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up); up = ASPM_L1_SUPPORTED(up); /* ASPM works on A-step but is reported as not supported */ - return (!!dn || is_ax(dd)) && !!up; + return !!ret_dn && !!ret_up && (!!dn || is_ax(dd)) && !!up; } /* Set L1 entrance latency for slower entry to L1 */ -- 2.18.2