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[23.128.96.18]) by mx.google.com with ESMTP id f8si10874076edv.497.2020.07.14.05.16.40; Tue, 14 Jul 2020 05:17:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728840AbgGNMPN (ORCPT + 99 others); Tue, 14 Jul 2020 08:15:13 -0400 Received: from 8bytes.org ([81.169.241.247]:53652 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728324AbgGNMKz (ORCPT ); Tue, 14 Jul 2020 08:10:55 -0400 Received: from cap.home.8bytes.org (p5b006776.dip0.t-ipconnect.de [91.0.103.118]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by theia.8bytes.org (Postfix) with ESMTPSA id CB707F3C; Tue, 14 Jul 2020 14:10:51 +0200 (CEST) From: Joerg Roedel To: x86@kernel.org Cc: Joerg Roedel , Joerg Roedel , hpa@zytor.com, Andy Lutomirski , Dave Hansen , Peter Zijlstra , Jiri Slaby , Dan Williams , Tom Lendacky , Juergen Gross , Kees Cook , David Rientjes , Cfir Cohen , Erdem Aktas , Masami Hiramatsu , Mike Stunes , Sean Christopherson , Martin Radev , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, virtualization@lists.linux-foundation.org Subject: [PATCH v4 35/75] x86/head/64: Load IDT earlier Date: Tue, 14 Jul 2020 14:08:37 +0200 Message-Id: <20200714120917.11253-36-joro@8bytes.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200714120917.11253-1-joro@8bytes.org> References: <20200714120917.11253-1-joro@8bytes.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Joerg Roedel Load the IDT right after switching to virtual addresses in head_64.S so that the kernel can handle #VC exceptions. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/setup.h | 2 ++ arch/x86/kernel/head64.c | 18 ++++++++++++++++++ arch/x86/kernel/head_64.S | 28 ++++++++++++++++++++++++++++ 3 files changed, 48 insertions(+) diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h index 84b645cc8bc9..19ccb1211004 100644 --- a/arch/x86/include/asm/setup.h +++ b/arch/x86/include/asm/setup.h @@ -39,6 +39,7 @@ void vsmp_init(void); static inline void vsmp_init(void) { } #endif + void setup_bios_corruption_check(void); void early_platform_quirks(void); @@ -49,6 +50,7 @@ extern void i386_reserve_resources(void); extern unsigned long __startup_64(unsigned long physaddr, struct boot_params *bp); extern unsigned long __startup_secondary_64(void); extern int early_make_pgtable(unsigned long address); +extern void early_idt_setup_early_handler(unsigned long descr_addr, unsigned long physaddr); #ifdef CONFIG_X86_INTEL_MID extern void x86_intel_mid_early_setup(void); diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 51059bfd4b99..3598c091ff24 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -508,3 +508,21 @@ void __init x86_64_start_reservations(char *real_mode_data) start_kernel(); } + +void __head early_idt_setup_early_handler(unsigned long descr_addr, unsigned long physaddr) +{ + struct desc_ptr *descr = (struct desc_ptr *)descr_addr; + gate_desc *idt = (gate_desc *)descr->address; + int i; + + idt = fixup_pointer(idt, physaddr); + + for (i = 0; i < NUM_EXCEPTION_VECTORS; i++) { + struct idt_data data; + gate_desc desc; + + init_idt_data(&data, i, early_idt_handler_array[i]); + idt_init_desc(&desc, &data); + native_write_idt_entry(idt, i, &desc); + } +} diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index fcaa5dbd728a..8f9548071e84 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -105,6 +105,31 @@ SYM_CODE_START_NOALIGN(startup_64) leaq _text(%rip), %rdi pushq %rsi call __startup_64 + /* Save return value */ + pushq %rax + + /* + * Load IDT with early handlers - needed for SEV-ES + * Do this here because this must only happen on the boot CPU + * and the code below is shared with secondary CPU bringup. + */ + + /* IDT descriptor with pointer to IDT table as first parameter */ + leaq idt_descr(%rip), %rdi + + /* Kernel _text offset as second parameter */ + leaq _text(%rip), %rsi + + /* + * Setup IDT with early entries - The entries already use virtual + * addresses, so the IDT can't be used until the kernel switched to + * virtual addresses too. + */ + call early_idt_setup_early_handler + + /* Restore __startup_64 return value*/ + popq %rax + /* Restore pointer to real_mode_data */ popq %rsi /* Form the CR3 value being sure to include the CR3 modifier */ @@ -201,6 +226,9 @@ SYM_CODE_START(secondary_startup_64) */ movq initial_stack(%rip), %rsp + /* Load IDT */ + lidt idt_descr(%rip) + /* Check if nx is implemented */ movl $0x80000001, %eax cpuid -- 2.27.0