Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
IronPort-SDR: 5kFZIPyyF5BX1olXUIdtRgpDiSNv3KWZdbkW2Lyhaopl2i8LothharO7VB1ekHbs/xxqdHpo3z
 HloZNSW3DqUQ==
IronPort-SDR: 02iT5VGUP1t3TkSy4aSEJsgY7sdXokkPQAKZ4y4NCffmb8nZn4lAwYl4GgJeofeS+5NrExA2NR
 0UchQIao64sQ==
From:   "Ooi, Joyce" <joyce.ooi@intel.com>
To:     David Miller <davem@davemloft.net>
CC:     "thor.thayer@linux.intel.com" <thor.thayer@linux.intel.com>,
        "kuba@kernel.org" <kuba@kernel.org>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "dalon.westergreen@linux.intel.com" 
        <dalon.westergreen@linux.intel.com>,
        "Tan, Ley Foon" <ley.foon.tan@intel.com>,
        "See, Chin Liang" <chin.liang.see@intel.com>,
        "Nguyen, Dinh" <dinh.nguyen@intel.com>,
        "Westergreen, Dalon" <dalon.westergreen@intel.com>
Subject: RE: [PATCH v4 09/10] net: eth: altera: add msgdma prefetcher
Thread-Topic: [PATCH v4 09/10] net: eth: altera: add msgdma prefetcher
Thread-Index: AQHWVPkVfRS7e+4eCk6tElo6txFdaaj98fQAgAk8H7A=
Date:   Tue, 14 Jul 2020 14:36:32 +0000
Message-ID: <CY4PR11MB1253B09441D400910C611807F2610@CY4PR11MB1253.namprd11.prod.outlook.com>
References: <20200708072401.169150-1-joyce.ooi@intel.com>
        <20200708072401.169150-10-joyce.ooi@intel.com>
 <20200708.103354.707974548958033107.davem@davemloft.net>
In-Reply-To: <20200708.103354.707974548958033107.davem@davemloft.net>
Accept-Language: en-US
Content-Language: en-US
dlp-product: dlpe-windows
dlp-reaction: no-action
dlp-version: 11.2.0.6
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-Network-Message-Id: 1fb501b4-5930-4507-f532-08d828034d75
X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Jul 2020 14:36:32.0695
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: 4//UWvUgIzxSO2dpkX6E08S4wWHoCfFDXVSIfx3r9Qc98pWPEB94do+QeCBsgdHWIAFWttSSFRLgN9oQq+rPtg==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR11MB2040
X-OriginatorOrg: intel.com
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

> -----Original Message-----
> From: David Miller <davem@davemloft.net>
> Sent: Thursday, July 9, 2020 1:34 AM
> To: Ooi, Joyce <joyce.ooi@intel.com>
> Cc: thor.thayer@linux.intel.com; kuba@kernel.org; netdev@vger.kernel.org;
> linux-kernel@vger.kernel.org; dalon.westergreen@linux.intel.com; Tan, Ley
> Foon <ley.foon.tan@intel.com>; See, Chin Liang <chin.liang.see@intel.com>=
;
> Nguyen, Dinh <dinh.nguyen@intel.com>; Westergreen, Dalon
> <dalon.westergreen@intel.com>
> Subject: Re: [PATCH v4 09/10] net: eth: altera: add msgdma prefetcher
>=20
> From: "Ooi, Joyce" <joyce.ooi@intel.com>
> Date: Wed,  8 Jul 2020 15:24:00 +0800
>=20
> > +int msgdma_pref_initialize(struct altera_tse_private *priv) {
> > +	int i;
> > +	struct msgdma_pref_extended_desc *rx_descs;
> > +	struct msgdma_pref_extended_desc *tx_descs;
> > +	dma_addr_t rx_descsphys;
> > +	dma_addr_t tx_descsphys;
>=20
> Reverse christmas tree please.
>=20
> > +netdev_tx_t msgdma_pref_tx_buffer(struct altera_tse_private *priv,
> > +				  struct tse_buffer *buffer)
> > +{
> > +	u32 desc_entry =3D priv->tx_prod % (priv->tx_ring_size * 2);
> > +	struct msgdma_pref_extended_desc *tx_descs =3D priv->pref_txdesc;
>=20
> Likewise.
>=20
> > +u32 msgdma_pref_tx_completions(struct altera_tse_private *priv) {
> > +	u32 control;
> > +	u32 ready =3D 0;
> > +	u32 cons =3D priv->tx_cons;
> > +	u32 desc_ringsize =3D priv->tx_ring_size * 2;
> > +	u32 ringsize =3D priv->tx_ring_size;
> > +	u64 ns =3D 0;
> > +	struct msgdma_pref_extended_desc *cur;
> > +	struct tse_buffer *tx_buff;
> > +	struct skb_shared_hwtstamps shhwtstamp;
> > +	int i;
>=20
> Likewise.
>=20
> > +u32 msgdma_pref_rx_status(struct altera_tse_private *priv) {
> > +	u32 rxstatus =3D 0;
> > +	u32 pktlength;
> > +	u32 pktstatus;
> > +	u64 ns =3D 0;
> > +	u32 entry =3D priv->rx_cons % priv->rx_ring_size;
> > +	u32 desc_entry =3D priv->rx_prod % (priv->rx_ring_size * 2);
> > +	struct msgdma_pref_extended_desc *rx_descs =3D priv->pref_rxdesc;
> > +	struct skb_shared_hwtstamps *shhwtstamp =3D NULL;
> > +	struct tse_buffer *rx_buff =3D priv->rx_ring;
>=20
> Likewise.
>=20
> > +	} else if (priv->dmaops &&
> > +			   priv->dmaops->altera_dtype =3D=3D
> > +			   ALTERA_DTYPE_MSGDMA_PREF) {
>=20
> This is not properly formatted.
>=20
> On a multi-line conditional, every subsequent line after the first should=
 align
> with the first column after the openning parenthesis of the first line.

Noted, will make the changes.