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[23.128.96.18]) by mx.google.com with ESMTP id j20si1198307ejx.721.2020.07.16.05.40.45; Thu, 16 Jul 2020 05:41:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@megous.com header.s=mail header.b=X089cgNO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=megous.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728694AbgGPMiP (ORCPT + 99 others); Thu, 16 Jul 2020 08:38:15 -0400 Received: from vps.xff.cz ([195.181.215.36]:42186 "EHLO vps.xff.cz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728505AbgGPMiO (ORCPT ); Thu, 16 Jul 2020 08:38:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=megous.com; s=mail; t=1594903092; bh=dSbyi6wULGgN5LmJysYayv3TsF8wkvs/olfr2qRV6H0=; h=From:To:Cc:Subject:Date:References:From; b=X089cgNO00tj2xzQgTQefrTAbp/6POIMBW/ZM8iMbezzHouqiZwooLtWgP8t4invr RT2Jc4b96uw7wXyao4O7bMHH9/Bma+eGeWcv3qk6skTfZgPblpJoppIeMvYx/dC6xU kSgoCiq1L4O8uGB5sCz0UpLnWRArqFx5eUA0aFPg= From: Ondrej Jirman To: David Airlie , Daniel Vetter , Thierry Reding , Sam Ravnborg , Fabio Estevam , =?UTF-8?q?Guido=20G=C3=BCnther?= , Robert Chiras Cc: Ondrej Jirman , Samuel Holland , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] drm/panel: st7703: Make the sleep exit timing match the spec Date: Thu, 16 Jul 2020 14:37:52 +0200 Message-Id: <20200716123753.3552425-2-megous@megous.com> In-Reply-To: <20200716123753.3552425-1-megous@megous.com> References: <20200716123753.3552425-1-megous@megous.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver seemed to try to make the total cumulative time of all delays across the whole power up sequence to sum up to 120ms. The datasheet on the other hand specifies that there needs to be 120ms delay after the sleep out command, not after reset as the driver assumes. Lastly, the delay between init commands and the sleep exit command is not necessary. (not specified anywhere) Reported-by: Samuel Holland Signed-off-by: Ondrej Jirman --- drivers/gpu/drm/panel/panel-sitronix-st7703.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c index 8996ced2b721..45833e6a0f4f 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c @@ -291,7 +291,6 @@ static int xbd599_init_sequence(struct st7703 *ctx) dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x07, /* VREF_SEL = 4.2V */ 0x07 /* NVREF_SEL = 4.2V */); - msleep(20); dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x2C, /* VCOMDC_F = -0.67V */ @@ -369,16 +368,14 @@ static int st7703_enable(struct drm_panel *panel) return ret; } - msleep(20); - ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { DRM_DEV_ERROR(ctx->dev, "Failed to exit sleep mode: %d\n", ret); return ret; } - /* Panel is operational 120 msec after reset */ - msleep(60); + /* Dsiplay on can be issued 120 msec after sleep out */ + msleep(120); ret = mipi_dsi_dcs_set_display_on(dsi); if (ret) -- 2.27.0