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[23.128.96.18]) by mx.google.com with ESMTP id p14si3462569edm.364.2020.07.16.08.15.20; Thu, 16 Jul 2020 08:15:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728791AbgGPPPK (ORCPT + 99 others); Thu, 16 Jul 2020 11:15:10 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:46778 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728552AbgGPPPK (ORCPT ); Thu, 16 Jul 2020 11:15:10 -0400 Received: from xps.home (unknown [IPv6:2a01:e35:2fb5:1510:95f7:ce7f:fb76:c54a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: aferraris) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id AB2852A5297; Thu, 16 Jul 2020 16:15:08 +0100 (BST) From: Arnaud Ferraris To: alsa-devel@alsa-project.org Cc: Timur Tabi , Nicolin Chen , Xiubo Li , Fabio Estevam , Shengjiu Wang , Liam Girdwood , Mark Brown , linux-kernel@vger.kernel.org, kernel@collabora.com, Arnaud Ferraris Subject: [PATCH v2 1/2] ASoC: fsl_asrc: make sure the input and output clocks are different Date: Thu, 16 Jul 2020 17:13:52 +0200 Message-Id: <20200716151352.193451-2-arnaud.ferraris@collabora.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200716151352.193451-1-arnaud.ferraris@collabora.com> References: <20200716145201.186270-1-arnaud.ferraris@collabora.com> <20200716151352.193451-1-arnaud.ferraris@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current clock selection algorithm might select the same clock for both input and output. This can happen when, for instance, the output sample rate is a multiple of the input rate. This patch makes sure it always selects distinct input and output clocks. Signed-off-by: Arnaud Ferraris --- sound/soc/fsl/fsl_asrc.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 02c81d2e34ad..6d43cab6c885 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -608,8 +608,8 @@ static void fsl_asrc_select_clk(struct fsl_asrc_priv *asrc_priv, { struct fsl_asrc_pair_priv *pair_priv = pair->private; struct asrc_config *config = pair_priv->config; - int rate[2], select_clk[2]; /* Array size 2 means IN and OUT */ - int clk_rate, clk_index; + int rate[2], select_clk[2], clk_index[2]; /* Array size 2 means IN and OUT */ + int clk_rate; int i = 0, j = 0; rate[IN] = in_rate; @@ -618,11 +618,12 @@ static void fsl_asrc_select_clk(struct fsl_asrc_priv *asrc_priv, /* Select proper clock source for internal ratio mode */ for (j = 0; j < 2; j++) { for (i = 0; i < ASRC_CLK_MAP_LEN; i++) { - clk_index = asrc_priv->clk_map[j][i]; - clk_rate = clk_get_rate(asrc_priv->asrck_clk[clk_index]); + clk_index[j] = asrc_priv->clk_map[j][i]; + clk_rate = clk_get_rate(asrc_priv->asrck_clk[clk_index[j]]); /* Only match a perfect clock source with no remainder */ if (clk_rate != 0 && (clk_rate / rate[j]) <= 1024 && - (clk_rate % rate[j]) == 0) + (clk_rate % rate[j]) == 0 && + (j == 0 || clk_index[j] != clk_index[j-1])) break; } -- 2.27.0