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Date:   Thu, 16 Jul 2020 19:13:13 -0700
From:   Nathan Chancellor <natechancellor@gmail.com>
To:     Bjorn Andersson <bjorn.andersson@linaro.org>
Cc:     Ohad Ben-Cohen <ohad@wizery.com>, linux-arm-msm@vger.kernel.org,
        linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org,
        Lee Jones <lee.jones@linaro.org>
Subject: Re: [PATCH] remoteproc: qcom: pil-info: Fix shift overflow
Message-ID: <20200717021313.GA4098480@ubuntu-n2-xlarge-x86>
References: <20200716054817.157608-1-bjorn.andersson@linaro.org>
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On Wed, Jul 15, 2020 at 10:48:17PM -0700, Bjorn Andersson wrote:
> On platforms with 32-bit phys_addr_t the shift to get the upper word of
> the base address of the memory region is invalid. Cast the base to 64
> bit to resolv this.
> 
> Fixes: 549b67da660d ("remoteproc: qcom: Introduce helper to store pil info in IMEM")
> Reported-by: Lee Jones <lee.jones@linaro.org>
> Reported-by: Nathan Chancellor <natechancellor@gmail.com>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Tested-by: Nathan Chancellor <natechancellor@gmail.com> # build

> ---
>  drivers/remoteproc/qcom_pil_info.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/remoteproc/qcom_pil_info.c b/drivers/remoteproc/qcom_pil_info.c
> index 0536e3904669..5521c4437ffa 100644
> --- a/drivers/remoteproc/qcom_pil_info.c
> +++ b/drivers/remoteproc/qcom_pil_info.c
> @@ -108,7 +108,7 @@ int qcom_pil_info_store(const char *image, phys_addr_t base, size_t size)
>  found_existing:
>  	/* Use two writel() as base is only aligned to 4 bytes on odd entries */
>  	writel(base, entry + PIL_RELOC_NAME_LEN);
> -	writel(base >> 32, entry + PIL_RELOC_NAME_LEN + 4);
> +	writel((u64)base >> 32, entry + PIL_RELOC_NAME_LEN + 4);
>  	writel(size, entry + PIL_RELOC_NAME_LEN + sizeof(__le64));
>  	mutex_unlock(&pil_reloc_lock);
>  
> -- 
> 2.26.2
>