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[23.128.96.18]) by mx.google.com with ESMTP id a18si4889320edx.421.2020.07.17.01.05.51; Fri, 17 Jul 2020 01:06:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728233AbgGQIFk (ORCPT + 99 others); Fri, 17 Jul 2020 04:05:40 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:52240 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726233AbgGQIFk (ORCPT ); Fri, 17 Jul 2020 04:05:40 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 06DC456026DCBC285F91; Fri, 17 Jul 2020 16:05:36 +0800 (CST) Received: from DESKTOP-5IS4806.china.huawei.com (10.174.187.22) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Fri, 17 Jul 2020 16:05:26 +0800 From: Keqian Zhu To: , , , CC: Marc Zyngier , Catalin Marinas , Will Deacon , James Morse , "Suzuki K Poulose" , , Keqian Zhu Subject: [PATCH] drivers: arm arch timer: Correct fault programming of CNTKCTL_EL1.EVNTI Date: Fri, 17 Jul 2020 16:05:15 +0800 Message-ID: <20200717080515.19088-1-zhukeqian1@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.174.187.22] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ARM virtual counter supports event stream, it can only trigger an event when the trigger bit (the value of CNTKCTL_EL1.EVNTI) of CNTVCT_EL0 changes, so the actual period of event stream is 2^(cntkctl_evnti + 1). For example, when the trigger bit is 0, then virtual counter trigger an event for every two cycles. Signed-off-by: Keqian Zhu --- drivers/clocksource/arm_arch_timer.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index ecf7b7db2d05..bc019dd0975b 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -799,10 +799,20 @@ static void __arch_timer_setup(unsigned type, static void arch_timer_evtstrm_enable(int divider) { u32 cntkctl = arch_timer_get_cntkctl(); + int cntkctl_evnti; + + /* + * Note that it can only trigger an event when the trigger bit + * of CNTVCT_EL0 changes, so the actual period of event stream + * is 2^(cntkctl_evnti + 1). + */ + cntkctl_evnti = divider - 1; + cntkctl_evnti = min(cntkctl_evnti, 15); + cntkctl_evnti = max(cntkctl_evnti, 0); cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK; /* Set the divider and enable virtual event stream */ - cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT) + cntkctl |= (cntkctl_evnti << ARCH_TIMER_EVT_TRIGGER_SHIFT) | ARCH_TIMER_VIRT_EVT_EN; arch_timer_set_cntkctl(cntkctl); arch_timer_set_evtstrm_feature(); @@ -816,10 +826,11 @@ static void arch_timer_configure_evtstream(void) /* Find the closest power of two to the divisor */ evt_stream_div = arch_timer_rate / ARCH_TIMER_EVT_STREAM_FREQ; pos = fls(evt_stream_div); - if (pos > 1 && !(evt_stream_div & (1 << (pos - 2)))) + if ((pos == 1) || (pos > 1 && !(evt_stream_div & (1 << (pos - 2))))) pos--; + /* enable event stream */ - arch_timer_evtstrm_enable(min(pos, 15)); + arch_timer_evtstrm_enable(pos); } static void arch_counter_set_user_access(void) -- 2.19.1