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Date:   Sat, 18 Jul 2020 16:00:49 +0300
From:   Vladimir Oltean <olteanv@gmail.com>
To:     Matthew Hagan <mnhagan88@gmail.com>
Cc:     Andrew Lunn <andrew@lunn.ch>, Jakub Kicinski <kuba@kernel.org>,
        Vivien Didelot <vivien.didelot@gmail.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        "David S. Miller" <davem@davemloft.net>, linux@armlinux.org.uk,
        netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
        John Crispin <john@phrozen.org>,
        Jonathan McDowell <noodles@earth.li>,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/2] dt-bindings: net: dsa: qca8k: Add PORT0_PAD_CTRL
 properties
Message-ID: <20200718130049.jqw4ckfmnld5jcdd@skbuf>
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On Fri, Jul 17, 2020 at 08:26:02PM +0100, Matthew Hagan wrote:
> 
> 
> On 16/07/2020 23:32, Andrew Lunn wrote:
> > On Thu, Jul 16, 2020 at 03:09:25PM -0700, Jakub Kicinski wrote:
> >> On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote:
> >>> Add names and decriptions of additional PORT0_PAD_CTRL properties.
> >>>
> >>> Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
> >>> ---
> >>>  Documentation/devicetree/bindings/net/dsa/qca8k.txt | 8 ++++++++
> >>>  1 file changed, 8 insertions(+)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
> >>> index ccbc6d89325d..3d34c4f2e891 100644
> >>> --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt
> >>> +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
> >>> @@ -13,6 +13,14 @@ Optional properties:
> >>>  
> >>>  - reset-gpios: GPIO to be used to reset the whole device
> >>>  
> >>> +Optional MAC configuration properties:
> >>> +
> >>> +- qca,exchange-mac0-mac6:	If present, internally swaps MAC0 and MAC6.
> >>
> >> Perhaps we can say a little more here?
> >>
> >>> +- qca,sgmii-rxclk-falling-edge:	If present, sets receive clock phase to
> >>> +				falling edge.
> >>> +- qca,sgmii-txclk-falling-edge:	If present, sets transmit clock phase to
> >>> +				falling edge.
> >>
> >> These are not something that other vendors may implement and therefore
> >> something we may want to make generic? Andrew?
> > 
> > I've never seen any other vendor implement this. Which to me makes me
> > think this is a vendor extension, to Ciscos vendor extension of
> > 1000BaseX.
> > 
> > Matthew, do you have a real use cases of these? I don't see a DT patch
> > making use of them. And if you do, what is the PHY on the other end
> > which also allows you to invert the clocks?
> > 
> The use case I am working on is the Cisco Meraki MX65 which requires bit
> 18 set (qca,sgmii-txclk-falling-edge). On the other side is a BCM58625
> SRAB with ports 4 and 5 in SGMII mode. There is no special polarity
> configuration set on this side though I do have very limited info on
> what is available. The settings I have replicate the vendor
> configuration extracted from the device.
> 
> The qca,sgmii-rxclk-falling-edge option (bit 19) is commonly used
> according to the device trees found in the OpenWrt, which is still using
> the ar8216 driver. With a count through the ar8327-initvals I see bit 19
> set on 18 of 22 devices using SGMII on MAC0.
> >        Andrew
> > 
> 
> Matthew

Let's say I'm a user. When would I need to set
qca,sgmii-txclk-falling-edge and/or qca,sgmii-rxclk-falling-edge, and
wwhen would I need not to?

Thanks,
-Vladimir