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Date:   Sat, 18 Jul 2020 16:08:05 +0100
From:   Russell King - ARM Linux admin <linux@armlinux.org.uk>
To:     Andrew Lunn <andrew@lunn.ch>
Cc:     John Crispin <john@phrozen.org>,
        Matthew Hagan <mnhagan88@gmail.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Vivien Didelot <vivien.didelot@gmail.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        "David S. Miller" <davem@davemloft.net>, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, Jonathan McDowell <noodles@earth.li>,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/2] dt-bindings: net: dsa: qca8k: Add PORT0_PAD_CTRL
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Message-ID: <20200718150805.GR1551@shell.armlinux.org.uk>
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On Sat, Jul 18, 2020 at 04:44:35PM +0200, Andrew Lunn wrote:
> On Sat, Jul 18, 2020 at 02:20:11PM +0100, Russell King - ARM Linux admin wrote:
> > On Fri, Jul 17, 2020 at 10:44:19PM +0200, John Crispin wrote:
> > > in regards to the sgmii clk skew. I never understood the electrics fully I
> > > am afraid, but without the patch it simply does not work. my eletcric foo is
> > > unfortunately is not sufficient to understand the "whys" I am afraid.
> > 
> > Do you happen to know what frequency the clock is?  Is it 1.25GHz or
> > 625MHz?  It sounds like it may be 1.25GHz if the edge is important.
> 
> I'm also a bit clueless when it comes to these systems.
> 
> I thought the clock was embedded into the SERDES signal? You recover
> it from the signal?

Indeed it is.  An external clock can be used to avoid needing clock
recovery in the SERDES receiver.

For example, with the 88E1111, it only accepts the datastream from
the MAC with no provision for a separate clock, but it can be
configured to generate a 625MHz clock for the data stream to the MAC
if required.

Being 625MHz (half the data rate), both edges of the clock are used,
with a delay to help avoid the metastability hazard I previously
described at the receiver.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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