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From:   Hua Dillon <dillonhua@gmail.com>
Date:   Mon, 20 Jul 2020 11:17:56 +0800
Message-ID: <CAPTRvH=ZSZBhmtW5=eXensuStYX=6s9AoqZncOZvZU8kVZXw9g@mail.gmail.com>
Subject: Re: [PATCH v2 2/2] ARM: dts: stm32: Enable MIPI DSI display support.
To:     Adrian Pop <pop.adrian61@gmail.com>
Cc:     Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        Alexandre Torgue <alexandre.torgue@st.com>,
        Rob Herring <robh+dt@kernel.org>,
        Lee Jones <lee.jones@linaro.org>, devicetree@vger.kernel.org,
        linux-stm32@st-md-mailman.stormreply.com,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
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Hi Adrian,

Adrian Pop <pop.adrian61@gmail.com> =E4=BA=8E2020=E5=B9=B47=E6=9C=8819=E6=
=97=A5=E5=91=A8=E6=97=A5 =E4=B8=8B=E5=8D=8810:54=E5=86=99=E9=81=93=EF=BC=9A
>
> Hello Hua,
>
> Thank you for your review,
>
> On Tue, Jul 14, 2020 at 6:37 AM Hua Dillon <dillonhua@gmail.com> wrote:
> >
> > Hi, Adrian,
> >
> > Just one suggestion for you.
> >
> > Adrian Pop <pop.adrian61@gmail.com> =E4=BA=8E2020=E5=B9=B47=E6=9C=883=
=E6=97=A5=E5=91=A8=E4=BA=94 =E4=B8=8A=E5=8D=881:30=E5=86=99=E9=81=93=EF=BC=
=9A
> > >
> > > STM32f769-disco features a 4" MIPI DSI display: add support for it.
> > > On Cortex-M7 DMA can't use cached memory. For this reason I use a ded=
icated
> > > memory pool for DMA with no-cache attribute which is located at the e=
nd of
> > >  RAM.
> > >
> > > Signed-off-by: Adrian Pop <pop.adrian61@gmail.com>
> > > ---
> > >  arch/arm/boot/dts/stm32f746.dtsi      | 34 +++++++++++++++++++
> > >  arch/arm/boot/dts/stm32f769-disco.dts | 49 +++++++++++++++++++++++++=
++
> > >  2 files changed, 83 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm=
32f746.dtsi
> > > index 93c063796780..577a812ca01c 100644
> > > --- a/arch/arm/boot/dts/stm32f746.dtsi
> > > +++ b/arch/arm/boot/dts/stm32f746.dtsi
> > > @@ -48,6 +48,19 @@ / {
> > >         #address-cells =3D <1>;
> > >         #size-cells =3D <1>;
> > >
> > > +       reserved-memory {
> > > +               #address-cells =3D <1>;
> > > +               #size-cells =3D <1>;
> > > +               ranges;
> > > +
> > > +               linux,dma {
> > > +                       compatible =3D "shared-dma-pool";
> > > +                       linux,dma-default;
> > > +                       no-map;
> > > +                       reg =3D <0xc0f00000 0x100000>;
> > > +               };
> > > +       };
> > > +
> > Christoph Hellwig was submit a patch for !CONFIG_MMU platforms to suppo=
rt mmap.
> > the patch is : 1fbf57d05302 dma-direct: re-enable mmap for !CONFIG_MMU
> > i thought there is no need to create a reserved-memory for it.
>
> Just tried with his patch, if I don't have the reserved-memory, I get:
>
> [drm] Initialized stm 1.0.0 20170330 for 40016800.display-controller on m=
inor 0
> ------------[ cut here ]------------
> WARNING: CPU: 0 PID: 5 at arch/arm/mm/dma-mapping-nommu.c:50 0xc000b8e9
> CPU: 0 PID: 5 Comm: kworker/0:0 Not tainted 5.8.0-rc1-next-20200616 #4
> Hardware name: STM32 (Device Tree Support)
> Workqueue: events 0xc0150fc1
>
> This is the reason I added the reserved memory in the first place.
>
Oh, sorry, i forget stm32f7 with cache inside. yes, you need a reserve
memory for that case.
but, "reg =3D <0xc0f00000 0x100000>;" should big enough for framebuffer,
as your know this is
a global reserve memory for all devices, it's might need more for
other devices, like camera etc.
or use per-device reserve memory region.

thanks.
> >
> > >         clocks {
> > >                 clk_hse: clk-hse {
> > >                         #clock-cells =3D <0>;
> > > @@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
> > >         };
> > >
> > >         soc {
> > > +               ltdc: display-controller@40016800 {
> > > +                       compatible =3D "st,stm32-ltdc";
> > > +                       reg =3D <0x40016800 0x200>;
> > > +                       interrupts =3D <88>, <89>;
> > > +                       resets =3D <&rcc STM32F7_APB2_RESET(LTDC)>;
> > > +                       clocks =3D <&rcc 1 CLK_LCD>;
> > > +                       clock-names =3D "lcd";
> > > +                       status =3D "disabled";
> > > +               };
> > > +
> > > +               dsi: dsi@40016c00 {
> > > +                       compatible =3D "st,stm32-dsi";
> > > +                       reg =3D <0x40016c00 0x800>;
> > > +                       interrupts =3D <98>;
> > > +                       clocks =3D <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
> > > +                       clock-names =3D "pclk", "ref";
> > > +                       resets =3D <&rcc STM32F7_APB2_RESET(DSI)>;
> > > +                       reset-names =3D "apb";
> > > +                       status =3D "disabled";
> > > +               };
> > > +
> > >                 timer2: timer@40000000 {
> > >                         compatible =3D "st,stm32-timer";
> > >                         reg =3D <0x40000000 0x400>;
> > > diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dt=
s/stm32f769-disco.dts
> > > index 1626e00bb2cb..a9e81b49809c 100644
> > > --- a/arch/arm/boot/dts/stm32f769-disco.dts
> > > +++ b/arch/arm/boot/dts/stm32f769-disco.dts
> > > @@ -153,3 +153,52 @@ &usbotg_hs {
> > >         pinctrl-names =3D "default";
> > >         status =3D "okay";
> > >  };
> > > +
> > > +&dsi {
> > > +       #address-cells =3D <1>;
> > > +       #size-cells =3D <0>;
> > > +       status =3D "okay";
> > > +
> > > +       ports {
> > > +               #address-cells =3D <1>;
> > > +               #size-cells =3D <0>;
> > > +
> > > +               port@0 {
> > > +                       reg =3D <0>;
> > > +                       dsi_in: endpoint {
> > > +                               remote-endpoint =3D <&ltdc_out_dsi>;
> > > +                       };
> > > +               };
> > > +
> > > +               port@1 {
> > > +                       reg =3D <1>;
> > > +                       dsi_out: endpoint {
> > > +                               remote-endpoint =3D <&dsi_in_panel>;
> > > +                       };
> > > +               };
> > > +
> > > +       };
> > > +
> > > +       panel: panel {
> > > +               compatible =3D "orisetech,otm8009a";
> > > +               reg =3D <0>;
> > > +               reset-gpios =3D <&gpioj 15 GPIO_ACTIVE_LOW>;
> > > +               status =3D "okay";
> > > +
> > > +               port {
> > > +                       dsi_in_panel: endpoint {
> > > +                               remote-endpoint =3D <&dsi_out>;
> > > +                       };
> > > +               };
> > > +       };
> > > +};
> > > +
> > > +&ltdc {
> > > +       status =3D "okay";
> > > +
> > > +       port {
> > > +               ltdc_out_dsi: endpoint {
> > > +                       remote-endpoint =3D <&dsi_in>;
> > > +               };
> > > +       };
> > > +};
> > > --
> > > 2.27.0
> > >
> > >
> > > _______________________________________________
> > > linux-arm-kernel mailing list
> > > linux-arm-kernel@lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> Regards,
> Adrian