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[23.128.96.18]) by mx.google.com with ESMTP id g88si12171844edd.117.2020.07.21.00.14.13; Tue, 21 Jul 2020 00:14:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@mg.codeaurora.org header.s=smtp header.b=miV1wKSB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728077AbgGUHOE (ORCPT + 99 others); Tue, 21 Jul 2020 03:14:04 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:40514 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726698AbgGUHOE (ORCPT ); Tue, 21 Jul 2020 03:14:04 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1595315643; h=Content-Transfer-Encoding: MIME-Version: Message-Id: Date: Subject: Cc: To: From: Sender; bh=EVrMW6wwp3PC7r9kiDLlWKaxlbOinFQQjxzQoFiW00o=; b=miV1wKSBB0VJig7utWONd+ISy2V+DhUW9ys+WttYMjEWF5xtFEqzDR4ilj/AE69d3tBjTOpG 728AByXOGmjoxCbBgDoaWaJA+XXmTZxvUn1WqYdD3YVcD9RVYCuzfrOXf7EGJA/a1TnNQGiD US2AaLJ6Ss4G8iiploWS833jc0c= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n20.prod.us-east-1.postgun.com with SMTP id 5f1695b98423214e13e2efb6 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 21 Jul 2020 07:14:01 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 12391C4339C; Tue, 21 Jul 2020 07:14:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from blr-ubuntu-253.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id B5441C433C9; Tue, 21 Jul 2020 07:13:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B5441C433C9 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=saiprakash.ranjan@codeaurora.org From: Sai Prakash Ranjan To: Andy Gross , Bjorn Andersson Cc: Mathieu Poirier , Suzuki K Poulose , Mike Leach , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sai Prakash Ranjan Subject: [PATCH] arm64: dts: qcom: sdm845: Support ETMv4 power management Date: Tue, 21 Jul 2020 12:43:43 +0530 Message-Id: <20200721071343.2898-1-saiprakash.ranjan@codeaurora.org> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add "arm,coresight-loses-context-with-cpu" property to coresight ETM nodes to avoid failure of trace session because of losing context on entering deep idle states. Signed-off-by: Sai Prakash Ranjan --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index e506793407d8..0b5f063dcaea 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3016,6 +3016,7 @@ etm@7040000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3035,6 +3036,7 @@ etm@7140000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3054,6 +3056,7 @@ etm@7240000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3073,6 +3076,7 @@ etm@7340000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3092,6 +3096,7 @@ etm@7440000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3111,6 +3116,7 @@ etm@7540000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3130,6 +3136,7 @@ etm@7640000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3149,6 +3156,7 @@ etm@7740000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation