Received: by 2002:a25:e74b:0:0:0:0:0 with SMTP id e72csp534870ybh; Tue, 21 Jul 2020 01:18:53 -0700 (PDT) X-Google-Smtp-Source: ABdhPJywX850czcfvv41cYfiKZphuy2rQPanLhfrJMiWchZ+FgMyMc42jzIiKWFmKcafbBDDIsLD X-Received: by 2002:aa7:d7cf:: with SMTP id e15mr25375671eds.236.1595319533676; Tue, 21 Jul 2020 01:18:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1595319533; cv=none; d=google.com; s=arc-20160816; b=KBGLdSYZLN8LXIAa5SpKRb1+kjFpw7U9yuLl+bTBesmzw7kRrAwuasTsO9+darnld7 SZlMSLaZjo+cZEP3gPhpE2EQhet6+Mx83Rr3XOHPzTDqmlmqlQMh/WmygraJIr69HPIS QT/BQZtskTaFOmkq8D5y6niE+B+/xIv02YegmYof8UAW+aoiD7Wq2CQEm1SdAUcLPwBt FUKudQ3Fs7LHIurk/yf7g/1ElsRZ8V4hKn6d2VJeRSCozhc/WukyybNtp1s+OMBAUQG3 63P5QN1cqtAcENVWkJXMZDB/3iWqbGHAxbq1z2WGymecjcc2zBwb0L8IQGrxU/lceAfW VoDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:date:cc:to:from:subject :message-id; bh=0hVpNW1pWgL9pd1VRgt5EPmFuPkYlivH2qtE+XmryF0=; b=rZSvRV3hJjoXDP1E4fsnYL6g5SY2nQoPGv9dCyfZ+o3YNDk1WFKrV9qFzCSE2f3sXW FMMekP6IhDiVHs9K9RoEWVDn3RqXzDK5cpH1xEoJNQWV213ix27gbiAIQ6O+0l9namE6 LhRplP1cabKnk7LSNupOpAnvVjE+uVfAXE1tOIY0kIvOLfx3kYroPpq4pvTydrl5z/yJ X3JWElbrQWocHZK73jFdidAJcn6TmssxfvZnJKEIgs6K1Q0y6oNUuCitjPen6lnYGLqy K8mfarZWAqe1S0OVe5Cg0gUST42Slv4EdaDd1NV3aqVfK02ALl2beDtMQT98hgiSoePg /Q+A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v26si11834579ejc.337.2020.07.21.01.18.30; Tue, 21 Jul 2020 01:18:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727955AbgGUIQH (ORCPT + 99 others); Tue, 21 Jul 2020 04:16:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725984AbgGUIQH (ORCPT ); Tue, 21 Jul 2020 04:16:07 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9342EC061794 for ; Tue, 21 Jul 2020 01:16:07 -0700 (PDT) Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=localhost) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jxnRS-0000UG-Aj; Tue, 21 Jul 2020 10:16:02 +0200 Message-ID: Subject: Re: [PATCH 1/2] ARM: dts: imx6qp-sabresd: enable pcie From: Lucas Stach To: Richard Zhu , bhelgaas@google.com, shawnguo@kernel.org, festevam@gmail.com Cc: linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Date: Tue, 21 Jul 2020 10:16:01 +0200 In-Reply-To: <1595317470-9394-1-git-send-email-hongxing.zhu@nxp.com> References: <1595317470-9394-1-git-send-email-hongxing.zhu@nxp.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.36.3 (3.36.3-1.fc32) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Dienstag, den 21.07.2020, 15:44 +0800 schrieb Richard Zhu: > Add one regulator, used to power up the external oscillator, > and enable PCIe on iMX6QP SABRESD board. That's not the right thing to do. If there is an external oscillator, which requires a power supply then the oscillator should have its own clock DT node (it's a separate device after all) and this node needs to control the regulator. This has nothing to do with the PCIe controller, which only cares about the clock being provided. Regards, Lucas > Signed-off-by: Richard Zhu > --- > arch/arm/boot/dts/imx6qp-sabresd.dts | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts > b/arch/arm/boot/dts/imx6qp-sabresd.dts > index 480e73183f6b..cd8a1f610427 100644 > --- a/arch/arm/boot/dts/imx6qp-sabresd.dts > +++ b/arch/arm/boot/dts/imx6qp-sabresd.dts > @@ -51,7 +51,8 @@ > }; > > &pcie { > - status = "disabled"; > + vepdev-supply = <&vgen3_reg>; > + status = "okay"; > }; > > &sata {