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Subject: Re: [PATCH 3/3] arm64: dts: meson: add support for the ODROID-N2+
From:   Christian Hewitt <christianshewitt@gmail.com>
In-Reply-To: <1jo8o98c2c.fsf@starbuckisacylon.baylibre.com>
Date:   Tue, 21 Jul 2020 15:07:38 +0400
Cc:     Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Kevin Hilman <khilman@baylibre.com>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
        Dongjin Kim <tobetter@hardkernel.com>
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Message-Id: <BA492513-A6EF-4938-ACB5-EA836379A968@gmail.com>
References: <20200719141034.8403-1-christianshewitt@gmail.com>
 <20200719141034.8403-4-christianshewitt@gmail.com>
 <1jo8o98c2c.fsf@starbuckisacylon.baylibre.com>
To:     Jerome Brunet <jbrunet@baylibre.com>
Sender: linux-kernel-owner@vger.kernel.org
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> On 21 Jul 2020, at 1:14 pm, Jerome Brunet <jbrunet@baylibre.com> =
wrote:
>=20
> On Sun 19 Jul 2020 at 16:10, Christian Hewitt =
<christianshewitt@gmail.com> wrote:
>=20
>> HardKernel ODROID-N2+ uses an Amlogic S922X rev. C chip capable of =
higher
>> clock speeds than the original ODROID-N2. Hardkernel supports the big =
cpu
>> cluster at 2.4GHz and the little cpu cluster at 2.0GHz. Opp points =
and
>> regulator changess are from the HardKernel Linux kernel sources.
>>=20
>> Suggested-by: Dongjin Kim <tobetter@hardkernel.com>
>> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
>> ---
>> arch/arm64/boot/dts/amlogic/Makefile          |  1 +
>> .../dts/amlogic/meson-g12b-odroid-n2-plus.dts | 53 =
+++++++++++++++++++
>> 2 files changed, 54 insertions(+)
>> create mode 100644 =
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
>>=20
>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile =
b/arch/arm64/boot/dts/amlogic/Makefile
>> index 5cac4d1d487d..6dc508b80133 100644
>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>> @@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_MESON) +=3D =
meson-g12b-gtking-pro.dtb
>> dtb-$(CONFIG_ARCH_MESON) +=3D meson-g12b-a311d-khadas-vim3.dtb
>> dtb-$(CONFIG_ARCH_MESON) +=3D meson-g12b-s922x-khadas-vim3.dtb
>> dtb-$(CONFIG_ARCH_MESON) +=3D meson-g12b-odroid-n2.dtb
>> +dtb-$(CONFIG_ARCH_MESON) +=3D meson-g12b-odroid-n2-plus.dtb
>> dtb-$(CONFIG_ARCH_MESON) +=3D meson-g12b-ugoos-am6.dtb
>> dtb-$(CONFIG_ARCH_MESON) +=3D meson-gxbb-kii-pro.dtb
>> dtb-$(CONFIG_ARCH_MESON) +=3D meson-gxbb-nanopi-k2.dtb
>> diff --git =
a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts =
b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
>> new file mode 100644
>> index 000000000000..99e96be509f8
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
>> @@ -0,0 +1,53 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (c) 2019 BayLibre, SAS
>> + * Author: Neil Armstrong <narmstrong@baylibre.com>
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "meson-g12b-odroid-n2.dtsi"
>> +
>> +/ {
>> +	compatible =3D "hardkernel,odroid-n2-plus", "amlogic,s922x", =
"amlogic,g12b";
>> +	model =3D "Hardkernel ODROID-N2+";
>> +
>> +	vddcpu_a: regulator-vddcpu-a {
>> +		regulator-min-microvolt =3D <680000>;
>> +		regulator-max-microvolt =3D <1040000>;
>> +
>> +		pwms =3D <&pwm_ab 0 1500 0>;
>> +	};
>> +
>> +	vddcpu_b: regulator-vddcpu-b {
>> +		regulator-min-microvolt =3D <680000>;
>> +		regulator-max-microvolt =3D <1040000>;
>> +
>> +		pwms =3D <&pwm_AO_cd 1 1500 0>;
>> +	};
>> +
>> +	cpu_opp_table_0: opp-table-0 {
>> +		opp-1908000000 {
>> +			opp-hz =3D /bits/ 64 <1908000000>;
>> +			opp-microvolt =3D <1030000>;
>> +		};
>> +
>> +		opp-2016000000 {
>> +			opp-hz =3D /bits/ 64 <2016000000>;
>> +			opp-microvolt =3D <1040000>;
>> +		};
>> +	};
>> +
>> +	cpub_opp_table_1: opp-table-1 {
>> +		opp-2304000000 {
>> +			opp-hz =3D /bits/ 64 <2304000000>;
>> +			opp-microvolt =3D <1030000>;
>> +		};
>> +
>> +		opp-2400000000 {
>> +			opp-hz =3D /bits/ 64 <2400000000>;
>> +			opp-microvolt =3D <1040000>;
>> +		};
>> +	};
>=20
> Are this opp specific to the N2+ or S922x rev C ?
> If it is the latter, shouldn't these be in s922x-revC dtsi ?

N2+ is currently the only known device with RevC chip (and shipping with
a huge heatsink) so we don=E2=80=99t know. I prefer to to put them in =
the board
dts for now and move to a common dtsi in the future once we=E2=80=99ve =
seen more
devices in the wild and proven they can handle the overclock.

Christian