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Tue, 21 Jul 2020 23:55:35 -0700 Received: from [172.19.3.8] (helo=xsjamitsuni50.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jy8f9-00036T-3I; Tue, 21 Jul 2020 23:55:35 -0700 From: Amit Sunil Dhamne To: mturquette@baylibre.com, m.tretter@pengutronix.de, sboyd@codeaurora.org, sboyd@kernel.org, michal.simek@xilinx.com, mark.rutland@arm.com, linux-clk@vger.kernel.org Cc: rajanv@xilinx.com, jollys@xilinx.com, tejasp@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Amit Sunil Dhamne Subject: [PATCH v2 0/3] clk: zynqmp: Add firmware specific clock flags Date: Tue, 21 Jul 2020 23:55:29 -0700 Message-Id: <1595400932-303612-1-git-send-email-amit.sunil.dhamne@xilinx.com> X-Mailer: git-send-email 2.7.4 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:xsj-pvapsmtpgw01;PTR:unknown-60-83.xilinx.com;CAT:NONE;SFTY:;SFS:(39850400004)(376002)(136003)(396003)(346002)(46966005)(107886003)(8936002)(8676002)(5660300002)(186003)(426003)(47076004)(478600001)(9786002)(6666004)(81166007)(336012)(26005)(316002)(2616005)(70206006)(82310400002)(70586007)(36756003)(83380400001)(4326008)(7696005)(2906002)(356005)(82740400003);DIR:OUT;SFP:1101; X-MS-PublicTrafficType: Email MIME-Version: 1.0 Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 2442af36-44ac-44ac-5614-08d82e0c3fa9 X-MS-TrafficTypeDiagnostic: BN7PR02MB4994: X-Microsoft-Antispam-PRVS: Content-Transfer-Encoding: quoted-printable X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: EDksFZcJ2ONGaM9pKpbSecEH2v6InCPwERwWgwm8Tii1ODgIlXCEe1QLQcnHyYJtumG+pLLt0ueo2N35slYIcwRqHO4Ev5p7sGp4G8dTi6mGbsAwlEdZvhHVMDWddtvjx+BefBi+haEltpjbgE+a2uVx+k77YOFCE9GF4tzApS6zso09bYec7Dox/VpO8FwYhUN06/A5tyfraZCxJ6NEvjNJTISdol/vfJo80XiCxkP6A1NG4jPDzRZGVet/VXtcSMVz4KUEGUlwS83oK8P6DqeWuVxQhEEFbu3GhT+fcsFgPKGSZZL9aT51Un3me8Zx20SFBFJueLooeFd98fpH9aXTD799LkihnU/ShXcCk0sB7izkqTw+e122QSxfUo42pwNIy1sRROJhX0hRmtAC0Q== X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jul 2020 06:55:41.5352 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2442af36-44ac-44ac-5614-08d82e0c3fa9 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: BL2NAM02FT023.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR02MB4994 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series adds supports for firmware specific flags. These include - Common Flags - Divider Flags - Mux Flags The intent is to remove firmware's dependency on CCF flag values by having firmware specific flags with independent values. Currently firmware is maintaining CCF specific flags and provides to CCF as it is. But CCF flag numbers may change and that shouldn't mean that the firmware needs to change. The firmware should have its own 'flag number space' that is distinct from the common clk framework's 'flag number space'. So use firmware specific clock flags in ZynqMP clock driver instead of CCF flags. Changes in v2: - Add helper function to map zynqmp flags with CCF flags. - Mapped zynqmp clock flags with CCF flags from zynqmp_clk_register_*() functions instead of __zynqmp_clock_get_topology() which is changing the flags to struct clk_init_data instead of the struct clock_topology. Rajan Vaja (3): clk: zynqmp: Use firmware specific common clock flags clk: zynqmp: Use firmware specific divider clock flags clk: zynqmp: Use firmware specific mux clock flags drivers/clk/zynqmp/clk-gate-zynqmp.c | 4 +++- drivers/clk/zynqmp/clk-mux-zynqmp.c | 18 ++++++++++++++-- drivers/clk/zynqmp/clk-zynqmp.h | 42 ++++++++++++++++++++++++++++++++= ++++ drivers/clk/zynqmp/clkc.c | 31 +++++++++++++++++++++++++- drivers/clk/zynqmp/divider.c | 21 +++++++++++++++--- drivers/clk/zynqmp/pll.c | 4 +++- 6 files changed, 112 insertions(+), 8 deletions(-) -- 2.7.4 This email and any attachments are intended for the sole use of the named r= ecipient(s) and contain(s) confidential information that may be proprietary= , privileged or copyrighted under applicable law. If you are not the intend= ed recipient, do not read, copy, or forward this email message or any attac= hments. Delete this email message and any attachments immediately.