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Date:   Wed, 22 Jul 2020 15:28:38 +0200
From:   Michael Tretter <m.tretter@pengutronix.de>
To:     Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com>
Cc:     mturquette@baylibre.com, sboyd@codeaurora.org, sboyd@kernel.org,
        michal.simek@xilinx.com, mark.rutland@arm.com,
        linux-clk@vger.kernel.org, rajanv@xilinx.com, jollys@xilinx.com,
        tejasp@xilinx.com, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, Rajan Vaja <rajan.vaja@xilinx.com>,
        Tejas Patel <tejas.patel@xilinx.com>
Subject: Re: [PATCH v2 3/3] clk: zynqmp: Use firmware specific mux clock flags
Message-ID: <20200722132838.GE21264@pengutronix.de>
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On Tue, 21 Jul 2020 23:55:32 -0700, Amit Sunil Dhamne wrote:
> From: Rajan Vaja <rajan.vaja@xilinx.com>
> 
> Use ZynqMP specific mux clock flags instead of using CCF flags.
> 
> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
> Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
> Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com>
> ---
>  drivers/clk/zynqmp/clk-mux-zynqmp.c | 14 +++++++++++++-
>  drivers/clk/zynqmp/clk-zynqmp.h     |  8 ++++++++
>  2 files changed, 21 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/zynqmp/clk-mux-zynqmp.c b/drivers/clk/zynqmp/clk-mux-zynqmp.c
> index 1dc17a0..10cf021 100644
> --- a/drivers/clk/zynqmp/clk-mux-zynqmp.c
> +++ b/drivers/clk/zynqmp/clk-mux-zynqmp.c
> @@ -125,7 +125,19 @@ struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id,
> 
>         init.parent_names = parents;
>         init.num_parents = num_parents;
> -       mux->flags = nodes->type_flag;
> +       mux->flags = 0;
> +       mux->flags |= (nodes->type_flag & ZYNQMP_CLK_MUX_INDEX_ONE) ?
> +                     CLK_MUX_INDEX_ONE : 0;
> +       mux->flags |= (nodes->type_flag & ZYNQMP_CLK_MUX_INDEX_BIT) ?
> +                     CLK_MUX_INDEX_BIT : 0;
> +       mux->flags |= (nodes->type_flag & ZYNQMP_CLK_MUX_HIWORD_MASK) ?
> +                     CLK_MUX_HIWORD_MASK : 0;
> +       mux->flags |= (nodes->type_flag & ZYNQMP_CLK_MUX_READ_ONLY) ?
> +                     CLK_MUX_READ_ONLY : 0;
> +       mux->flags |= (nodes->type_flag & ZYNQMP_CLK_MUX_ROUND_CLOSEST) ?
> +                     CLK_MUX_ROUND_CLOSEST : 0;
> +       mux->flags |= (nodes->type_flag & ZYNQMP_CLK_MUX_BIG_ENDIAN) ?
> +                     CLK_MUX_BIG_ENDIAN : 0;

Add a helper function for converting the flags.

Michael

>         mux->hw.init = &init;
>         mux->clk_id = clk_id;
> 
> diff --git a/drivers/clk/zynqmp/clk-zynqmp.h b/drivers/clk/zynqmp/clk-zynqmp.h
> index ec33525..b1ac7e8 100644
> --- a/drivers/clk/zynqmp/clk-zynqmp.h
> +++ b/drivers/clk/zynqmp/clk-zynqmp.h
> @@ -41,6 +41,14 @@
>  #define ZYNQMP_CLK_DIVIDER_READ_ONLY           BIT(5)
>  #define ZYNQMP_CLK_DIVIDER_MAX_AT_ZERO         BIT(6)
> 
> +/* Type Flags for mux clock */
> +#define ZYNQMP_CLK_MUX_INDEX_ONE               BIT(0)
> +#define ZYNQMP_CLK_MUX_INDEX_BIT               BIT(1)
> +#define ZYNQMP_CLK_MUX_HIWORD_MASK             BIT(2)
> +#define ZYNQMP_CLK_MUX_READ_ONLY               BIT(3)
> +#define ZYNQMP_CLK_MUX_ROUND_CLOSEST           BIT(4)
> +#define ZYNQMP_CLK_MUX_BIG_ENDIAN              BIT(5)
> +
>  enum topology_type {
>         TYPE_INVALID,
>         TYPE_MUX,
> --
> 2.7.4
> 
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