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[23.128.96.18]) by mx.google.com with ESMTP id bv8si1735988ejb.476.2020.07.23.03.44.44; Thu, 23 Jul 2020 03:45:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@linutronix.de header.s=2020 header.b=qXoZM4Cl; dkim=neutral (no key) header.i=@linutronix.de header.b=x70bXklA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728535AbgGWKn4 (ORCPT + 99 others); Thu, 23 Jul 2020 06:43:56 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:57136 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728496AbgGWKnr (ORCPT ); Thu, 23 Jul 2020 06:43:47 -0400 Date: Thu, 23 Jul 2020 10:43:44 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1595501025; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HMyfr3U78lbbM7ujA5CuzC2VlJEsKtAQ4GQXVttpFvE=; b=qXoZM4ClhxUBBoMSkmKI/6fKeCXOzx4HsyKP8UPwiU0ZCftcVcdM8mzk0J0uYgWecuW+As bf0TpBGO3hJP2m3gykjJygDcU/iXMZWimGmo/PE3bFyabqPxl7FuKQBdZqftZxhqSq/i3W fWJ8FzAFSPTFER1W6dqRHNY5ZIIpzoRY0PguyQJD2lXTM2ffm6XwQ6bRsjMlb3BGKLE3kf TVdgzHZDulPfJ0h3k8/A/JKhkOx9AYY38sirdAMurbNDecDs5wgexIUBnU7EvIOZpDK/Yq XUT8b4uXeQKfLyTQfVa9bzaD2+VC5aLGUX+bdXRIyB+mQhX60ikp60tOsZyVAg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1595501025; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HMyfr3U78lbbM7ujA5CuzC2VlJEsKtAQ4GQXVttpFvE=; b=x70bXklA7N5FXcDYJp9ideoLoKe1FXmZ5tZOqwaWCgyy0GeF5vok+H0XiEwca673PNzIS4 9IBljRU+0CQajVCA== From: "tip-bot2 for Brian Gerst" Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/asm] x86/percpu: Introduce size abstraction macros Cc: Brian Gerst , Nick Desaulniers , Thomas Gleixner , Sedat Dilek , Linus Torvalds , "Peter Zijlstra (Intel)" , Dennis Zhou , x86 , LKML In-Reply-To: <20200720204925.3654302-2-ndesaulniers@google.com> References: <20200720204925.3654302-2-ndesaulniers@google.com> MIME-Version: 1.0 Message-ID: <159550102479.4006.239690933685862718.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/asm branch of tip: Commit-ID: 6865dc3ae93b9acb336ca48bd7b2db3446d89370 Gitweb: https://git.kernel.org/tip/6865dc3ae93b9acb336ca48bd7b2db3446d89370 Author: Brian Gerst AuthorDate: Mon, 20 Jul 2020 13:49:15 -07:00 Committer: Thomas Gleixner CommitterDate: Thu, 23 Jul 2020 11:46:39 +02:00 x86/percpu: Introduce size abstraction macros In preparation for cleaning up the percpu operations, define macros for abstraction based on the width of the operation. Signed-off-by: Brian Gerst Signed-off-by: Nick Desaulniers Signed-off-by: Thomas Gleixner Tested-by: Nick Desaulniers Tested-by: Sedat Dilek Reviewed-by: Nick Desaulniers Acked-by: Linus Torvalds Acked-by: Peter Zijlstra (Intel) Acked-by: Dennis Zhou Link: https://lkml.kernel.org/r/20200720204925.3654302-2-ndesaulniers@google.com --- arch/x86/include/asm/percpu.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h index 2278797..19838e4 100644 --- a/arch/x86/include/asm/percpu.h +++ b/arch/x86/include/asm/percpu.h @@ -87,6 +87,36 @@ * don't give an lvalue though). */ extern void __bad_percpu_size(void); +#define __pcpu_type_1 u8 +#define __pcpu_type_2 u16 +#define __pcpu_type_4 u32 +#define __pcpu_type_8 u64 + +#define __pcpu_cast_1(val) ((u8)(((unsigned long) val) & 0xff)) +#define __pcpu_cast_2(val) ((u16)(((unsigned long) val) & 0xffff)) +#define __pcpu_cast_4(val) ((u32)(((unsigned long) val) & 0xffffffff)) +#define __pcpu_cast_8(val) ((u64)(val)) + +#define __pcpu_op1_1(op, dst) op "b " dst +#define __pcpu_op1_2(op, dst) op "w " dst +#define __pcpu_op1_4(op, dst) op "l " dst +#define __pcpu_op1_8(op, dst) op "q " dst + +#define __pcpu_op2_1(op, src, dst) op "b " src ", " dst +#define __pcpu_op2_2(op, src, dst) op "w " src ", " dst +#define __pcpu_op2_4(op, src, dst) op "l " src ", " dst +#define __pcpu_op2_8(op, src, dst) op "q " src ", " dst + +#define __pcpu_reg_1(mod, x) mod "q" (x) +#define __pcpu_reg_2(mod, x) mod "r" (x) +#define __pcpu_reg_4(mod, x) mod "r" (x) +#define __pcpu_reg_8(mod, x) mod "r" (x) + +#define __pcpu_reg_imm_1(x) "qi" (x) +#define __pcpu_reg_imm_2(x) "ri" (x) +#define __pcpu_reg_imm_4(x) "ri" (x) +#define __pcpu_reg_imm_8(x) "re" (x) + #define percpu_to_op(qual, op, var, val) \ do { \ typedef typeof(var) pto_T__; \