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[23.128.96.18]) by mx.google.com with ESMTP id k14si2459420eji.349.2020.07.23.11.47.46; Thu, 23 Jul 2020 11:48:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=qgVLpYxk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727771AbgGWSrW (ORCPT + 99 others); Thu, 23 Jul 2020 14:47:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726349AbgGWSrW (ORCPT ); Thu, 23 Jul 2020 14:47:22 -0400 Received: from mail-io1-xd41.google.com (mail-io1-xd41.google.com [IPv6:2607:f8b0:4864:20::d41]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 450D8C0619DC; Thu, 23 Jul 2020 11:47:22 -0700 (PDT) Received: by mail-io1-xd41.google.com with SMTP id i4so7319185iov.11; Thu, 23 Jul 2020 11:47:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=i26RyORzgcGhTDDr0Yskb0jorGpqOlxgU0nNXEtj6pQ=; b=qgVLpYxk5vJuma06OtQAPe9aQ9tEQZtCqrhWUEGb2poYmc917waO4ve8gZ+2gsK4w5 OEQW7m0eoqCi7WbqBLoyw7d6ZUXXNb/FTTVudun4oFPSDbzrAb8S7yD/p9zjZ/0wLSu4 HRFetF83/4iGRJFq9rakRw586ArBkMEzXf49fu4OHnPuHb3fvM/DSkikO/dms+AJVT2J 43l2owtl2CHo+4Zz2D4ZHoJIq+K71+Tgfstfq9A1Q8cF7lSUuvLhxUfIdBQGEe4vA9K3 D46P6x2Cl/7ktiNeUDqvl5oer7Zv4ZNc4S7NxAnx5ljOtWTQPrlZn459/qyKuN2zjGTU kf1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=i26RyORzgcGhTDDr0Yskb0jorGpqOlxgU0nNXEtj6pQ=; b=q6cdOAI8ermBUpFQX1y6a2hnyYdkP47eh/uZO88s8Xxlj5syG+wSGiw37lNLVqgsGg g6PogfSVzPcLvS+O6l9p5NbfYVgkJjsJsoU+zBlwqHr8sD4n+wHMu20DZO/eJtv14naX gmRAYa0EMI6l54GGS5MJlGu+6CnxvjDpp4fdjN6nNOMYhkQJWUB9Qg3GfI5UGM9fcbZj wz1yuorgcLLlwlysAngcyl7QpU+6R4rm71zzC+TxgAunDK1/CoGHY1OHqcDIi6jZ8otb v1epdHZzVJCLyUi01LYWilYQ3X24dO0kmOki0CnJpS2ceNEFQ/IhXsBqnrc5iquTf1kF ghuA== X-Gm-Message-State: AOAM531MJIHxo5LWJw8GmHe09J7lAe0/nv75sFmxFIJ8JshWx4EWr0tK MWzhrYXT3Lwnz4qcrqBxyiw02SVuKQXFcb3o3zw= X-Received: by 2002:a5d:9c0e:: with SMTP id 14mr6370304ioe.109.1595530041579; Thu, 23 Jul 2020 11:47:21 -0700 (PDT) MIME-Version: 1.0 References: <20200721185317.208722-1-marcin.sloniewski@gmail.com> <20200721185317.208722-3-marcin.sloniewski@gmail.com> <73077407-e008-1ae2-266d-1045a73620ba@st.com> In-Reply-To: <73077407-e008-1ae2-266d-1045a73620ba@st.com> From: =?UTF-8?Q?Marcin_S=C5=82oniewski?= Date: Thu, 23 Jul 2020 20:47:09 +0200 Message-ID: Subject: Re: [Linux-stm32] [PATCH v3 3/3] ARM: dts: stm32: add initial support for stm32mp157-odyssey board To: Christophe Kerello Cc: linux-arm-kernel@lists.infradead.org, Rob Herring , Stephan Gerhold , Manivannan Sadhasivam , Heiko Stuebner , Linus Walleij , linux-kernel@vger.kernel.org, Lubomir Rintel , Mark Brown , allen , Sam Ravnborg , linux-stm32@st-md-mailman.stormreply.com, devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Christophe, > > + pinctrl-names = "default", "opendrain", "sleep"; > > + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; > > + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; > > + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; > > + non-removable; > > + no-sd; > > + no-sdio; > > + st,neg-edge; > > + bus-width = <4>; > > + vmmc-supply = <&v3v3>; > > + vqmmc-supply = <&v3v3>; > > + mmc-ddr-3_3v; > > + status = "okay"; > > +}; > > Based on the pins muxed, 8 data lines are configured, but the bus width > is set to 4. What is the reason of not setting this property to 8? Yes, it was workaround, because sdmmc2 interface was working only with width set to 4. It turned out there was one wrong pin used in sdmmc2_d47_pins_a. It will be fixed in v4. Regards, Marcin Sloniewski