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Date:   Fri, 24 Jul 2020 10:06:41 -0500
From:   Bjorn Helgaas <helgaas@kernel.org>
To:     Logan Gunthorpe <logang@deltatee.com>
Cc:     Alex Deucher <alexdeucher@gmail.com>,
        LKML <linux-kernel@vger.kernel.org>,
        Linux PCI <linux-pci@vger.kernel.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Christian =?iso-8859-1?Q?K=F6nig?= <christian.koenig@amd.com>,
        Huang Rui <ray.huang@amd.com>,
        Andrew Maier <andrew.maier@eideticom.com>,
        "H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH] PCI/P2PDMA: Add AMD Zen 2 root complex to the list of
 allowed bridges
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On Thu, Jul 23, 2020 at 02:10:52PM -0600, Logan Gunthorpe wrote:
> On 2020-07-23 1:57 p.m., Bjorn Helgaas wrote:
> > On Thu, Jul 23, 2020 at 02:01:17PM -0400, Alex Deucher wrote:
> >> On Thu, Jul 23, 2020 at 1:43 PM Logan Gunthorpe <logang@deltatee.com> wrote:
> >>>
> >>> The AMD Zen 2 root complex (Starship/Matisse) was tested for P2PDMA
> >>> transactions between root ports and found to work. Therefore add it
> >>> to the list.
> >>>
> >>> Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
> >>> Cc: Bjorn Helgaas <bhelgaas@google.com>
> >>> Cc: Christian K?nig <christian.koenig@amd.com>
> >>> Cc: Huang Rui <ray.huang@amd.com>
> >>> Cc: Alex Deucher <alexdeucher@gmail.com>
> >>
> >> Starting with Zen, all AMD platforms support P2P for reads and writes.
> > 
> > What's the plan for getting out of the cycle of "update this list for
> > every new chip"?  Any new _DSMs planned, for instance?
> 
> Well there was an effort to add capabilities in the PCI spec to describe
> this but, as far as I know, they never got anywhere, and hardware still
> doesn't self describe with this.

Any idea what happened?  Is there hope for the future?  I'm really not
happy about signing up for open-ended device-specific patches like
this.  It's certainly not in the plug and play spirit that has made
PCI successful.  I know, preaching to the choir here.

Bjorn