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From:   Arnd Bergmann <arnd@arndb.de>
Date:   Mon, 27 Jul 2020 09:49:22 +0200
Message-ID: <CAK8P3a39E2ww_nuR0PHxT=Lnqsu+-mkHdbT+TzSnH6mYA7pKeA@mail.gmail.com>
Subject: Re: [PATCH 6/7] ARM:mstar: Add syscon node for "pmsleep" area
To:     Daniel Palmer <daniel@0x0f.com>
Cc:     SoC Team <soc@kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
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On Sun, Jul 26, 2020 at 6:40 AM Daniel Palmer <daniel@0x0f.com> wrote:
>
> MStar v7 SoCs contain a region of registers that are in the always on
> domain that the vendor code calls the "pmsleep" area.
>
> This area contains registers for a broad range of functionality and
> needs to be shared between drivers.
>
> This patch adds a syscon node for the pmsleep area so that other
> drivers can access registers in the area.
>
> Signed-off-by: Daniel Palmer <daniel@0x0f.com>

I think it would be better to add a more specific compatible string in
addition to the "syscon" one, to make it possible to later add a proper
driver for this area, in case there is a need for that.

       Arnd

> ---
>  arch/arm/boot/dts/mstar-v7.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
> index a73b1d162dfd..c8b192569d05 100644
> --- a/arch/arm/boot/dts/mstar-v7.dtsi
> +++ b/arch/arm/boot/dts/mstar-v7.dtsi
> @@ -73,6 +73,11 @@ riu: bus@1f000000 {
>                         #size-cells = <1>;
>                         ranges = <0x0 0x1f000000 0x00400000>;
>
> +                       pmsleep: syscon@1c00 {
> +                               compatible = "syscon";
> +                               reg = <0x1c00 0x100>;
> +                       };
> +
>                         l3bridge: l3bridge@204400 {
>                                 compatible = "mstar,l3bridge";
>                                 reg = <0x204400 0x200>;
> --
> 2.27.0
>