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Mon, 27 Jul 2020 19:28:23 +0000 Subject: Re: [PATCH] drm/amd/display: Clear dm_state for fast updates To: "Kazlauskas, Nicholas" , Mazin Rezk , "linux-kernel@vger.kernel.org" , "amd-gfx@lists.freedesktop.org" , "dri-devel@lists.freedesktop.org" Cc: Andrew Morton , Harry Wentland , "sunpeng.li@amd.com" , Kees Cook , Alexander Deucher , Duncan <1i5t5.duncan@cox.net>, "mphantomx@yahoo.com.br" , "regressions@leemhuis.info" , "anthony.ruhier@gmail.com" , Paul Menzel References: From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: <3b7e3e50-2ff7-eff3-2ffc-abaa4b36ce7f@amd.com> Date: Mon, 27 Jul 2020 21:28:15 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-ClientProxiedBy: AM0PR01CA0174.eurprd01.prod.exchangelabs.com (2603:10a6:208:aa::43) To MN2PR12MB3775.namprd12.prod.outlook.com (2603:10b6:208:159::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [IPv6:2a02:908:1252:fb60:be8a:bd56:1f94:86e7] (2a02:908:1252:fb60:be8a:bd56:1f94:86e7) by AM0PR01CA0174.eurprd01.prod.exchangelabs.com (2603:10a6:208:aa::43) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3216.23 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: rPU5mPmtTM4XnVPzAIoRv5k34aYkIpTEectF9EEI+IpywouyWEh5DnhQrETNP9ena7/svIhxtLimvaWcHqOryzj43Mf7Vd1LIef/uxgkFHJrWOL6AyoAIA7xSq34tozP5IVMpa9bkWKjW3yAtn/Zkvlti9Es6+6V6n6OZBumbWlw4KqZDF3i3nM+3TGogAkH5C3spn9oT7hx8RxlM+rWbV7jSVBTaBed0A0GSZwyUehLUrXPWhRCIrYVFi8150Ya33//CDw69d8zS5dpOGmKxeBX9lK+T273Uah1pVGioW5qsNAJ5fzRaMxHCyeK60xDzoUESuzUNL/A2Cica7HBHlZlBnfjWHLrGyaWkxayPDQIg7ql8AqyvBuFmMZZ3nVZ7rX1SNLgeY4LxnbGraxM7X3KefjmwXyOcc8eHG3+m8mtBpbznk/HYd804NLp8C9qR/Q7KqfMabtEqvLrLT5HL/S5LGuIJQx/5Ik17mqijkOR4XRBp5b94rzAKTfT7KYWEPITrvdsct0FoeVKxvED7i/h9Iw8NF/wA9G0TQ+/5RT39h3xmzHNexdqKvvmRvu5 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: a1a26105-45d0-4416-d3a8-08d8326339d5 X-MS-Exchange-CrossTenant-AuthSource: MN2PR12MB3775.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2020 19:28:22.8839 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 0IS3YDSEJPNcReBOtsbKDf3oLjIi372mzbPlp+9N69qU6bgtczVih7hGVCcuaEg7 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3886 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am 27.07.20 um 16:05 schrieb Kazlauskas, Nicholas: > On 2020-07-27 9:39 a.m., Christian König wrote: >> Am 27.07.20 um 07:40 schrieb Mazin Rezk: >>> This patch fixes a race condition that causes a use-after-free during >>> amdgpu_dm_atomic_commit_tail. This can occur when 2 non-blocking >>> commits >>> are requested and the second one finishes before the first. >>> Essentially, >>> this bug occurs when the following sequence of events happens: >>> >>> 1. Non-blocking commit #1 is requested w/ a new dm_state #1 and is >>> deferred to the workqueue. >>> >>> 2. Non-blocking commit #2 is requested w/ a new dm_state #2 and is >>> deferred to the workqueue. >>> >>> 3. Commit #2 starts before commit #1, dm_state #1 is used in the >>> commit_tail and commit #2 completes, freeing dm_state #1. >>> >>> 4. Commit #1 starts after commit #2 completes, uses the freed dm_state >>> 1 and dereferences a freelist pointer while setting the context. >> >> Well I only have a one mile high view on this, but why don't you let >> the work items execute in order? >> >> That would be better anyway cause this way we don't trigger a cache >> line ping pong between CPUs. >> >> Christian. > > We use the DRM helpers for managing drm_atomic_commit_state and those > helpers internally push non-blocking commit work into the system > unbound work queue. Mhm, well if you send those helper atomic commits in the order A,B and they execute it in the order B,A I would call that a bug :) > While we could duplicate a copy of that code with nothing but the > workqueue changed that isn't something I'd really like to maintain > going forward. I'm not talking about duplicating the code, I'm talking about fixing the helpers. I don't know that code well, but from the outside it sounds like a bug there. And executing work items in the order they are submitted is trivial. Had anybody pinged Daniel or other people familiar with the helper code about it? Regards, Christian. > > Regards, > Nicholas Kazlauskas > >> >>> >>> Since this bug has only been spotted with fast commits, this patch >>> fixes >>> the bug by clearing the dm_state instead of using the old dc_state for >>> fast updates. In addition, since dm_state is only used for its dc_state >>> and amdgpu_dm_atomic_commit_tail will retain the dc_state if none is >>> found, >>> removing the dm_state should not have any consequences in fast updates. >>> >>> This use-after-free bug has existed for a while now, but only caused a >>> noticeable issue starting from 5.7-rc1 due to 3202fa62f ("slub: >>> relocate >>> freelist pointer to middle of object") moving the freelist pointer from >>> dm_state->base (which was unused) to dm_state->context (which is >>> dereferenced). >>> >>> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=207383 >>> Fixes: bd200d190f45 ("drm/amd/display: Don't replace the dc_state >>> for fast updates") >>> Reported-by: Duncan <1i5t5.duncan@cox.net> >>> Signed-off-by: Mazin Rezk >>> --- >>>   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 36 >>> ++++++++++++++----- >>>   1 file changed, 27 insertions(+), 9 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >>> index 86ffa0c2880f..710edc70e37e 100644 >>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >>> @@ -8717,20 +8717,38 @@ static int amdgpu_dm_atomic_check(struct >>> drm_device *dev, >>>            * the same resource. If we have a new DC context as part of >>>            * the DM atomic state from validation we need to free it and >>>            * retain the existing one instead. >>> +         * >>> +         * Furthermore, since the DM atomic state only contains the DC >>> +         * context and can safely be annulled, we can free the state >>> +         * and clear the associated private object now to free >>> +         * some memory and avoid a possible use-after-free later. >>>            */ >>> -        struct dm_atomic_state *new_dm_state, *old_dm_state; >>> >>> -        new_dm_state = dm_atomic_get_new_state(state); >>> -        old_dm_state = dm_atomic_get_old_state(state); >>> +        for (i = 0; i < state->num_private_objs; i++) { >>> +            struct drm_private_obj *obj = state->private_objs[i].ptr; >>> >>> -        if (new_dm_state && old_dm_state) { >>> -            if (new_dm_state->context) >>> -                dc_release_state(new_dm_state->context); >>> +            if (obj->funcs == adev->dm.atomic_obj.funcs) { >>> +                int j = state->num_private_objs-1; >>> >>> -            new_dm_state->context = old_dm_state->context; >>> +                dm_atomic_destroy_state(obj, >>> +                        state->private_objs[i].state); >>> + >>> +                /* If i is not at the end of the array then the >>> +                 * last element needs to be moved to where i was >>> +                 * before the array can safely be truncated. >>> +                 */ >>> +                if (i != j) >>> +                    state->private_objs[i] = >>> +                        state->private_objs[j]; >>> >>> -            if (old_dm_state->context) >>> -                dc_retain_state(old_dm_state->context); >>> +                state->private_objs[j].ptr = NULL; >>> +                state->private_objs[j].state = NULL; >>> +                state->private_objs[j].old_state = NULL; >>> +                state->private_objs[j].new_state = NULL; >>> + >>> +                state->num_private_objs = j; >>> +                break; >>> +            } >>>           } >>>       } >>> >>> -- >>> 2.27.0 >>> >> >