Received: by 2002:a25:ca44:0:0:0:0:0 with SMTP id a65csp6597ybg;
        Mon, 27 Jul 2020 13:55:47 -0700 (PDT)
X-Google-Smtp-Source: ABdhPJw5cnYFVLfrAmBE73T7ozD7R9/46bnGaEtoVQQ1ZRaADYh/0klwVqemmBS5rEsDQ9CCFHHG
X-Received: by 2002:a17:906:3b91:: with SMTP id u17mr18159339ejf.305.1595883347320;
        Mon, 27 Jul 2020 13:55:47 -0700 (PDT)
ARC-Seal: i=1; a=rsa-sha256; t=1595883347; cv=none;
        d=google.com; s=arc-20160816;
        b=HxOFrIrLfjllA7tYJsatkq+edIoYtt/CH6nf57DGNJttWB7BzYoXNkC1iU+9K2gaGE
         0yKFn7XDxpxhV+FS38pTzgJUnwIVB99lrtW53XPZ8pNz0aZZcPF09JA5XA1UNxZAqlin
         fswOg+X/0p9KBbXUDnVhQqE5IAkvXddUArCG3Zsk98ye2Idqlb6gH3ffhTDDmL2twCj5
         o9VLW5gfbHKabYXJL92QrsEvYQP9tngO7lPKynQy53khXQfD5jXyvgeisKWxdjgzPGtq
         70PE/mEKCAGAzxempGLzdEPbA9g1HxmFfCuJU4Ri602Rs7bAUpPpw2K9P/f913bDu7x+
         QeIA==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:dkim-signature:mime-version:references
         :in-reply-to:message-id:date:subject:cc:to:from;
        bh=fdSdZA32H9070W4hnaqJFVzgkqKlU3QuQtTIBT8xq9Q=;
        b=TvpwtP31w8mootCkfoq97uw68WgnFOX4Vh5atNB0wX/t9w3Tlt/ODZqD7bDM3vf8Zn
         qBIlbmbji/qXH0VTtE6FaA9q7/yb6Y5TJsF57d9gVfDgDJU2Qn3GOLd51T6EFQAoUupJ
         8riwhW2vFjzNWuloig3XnyafjwGaZcsfuL5tEPMnt9sdoVcoyxMl8uC99azBGspbxvMg
         KOInHUPrOwWOH/tlAzkICBw3emY8VXXFpEVEj8V1qjIY9+FetRKekQfPsywuOHij753j
         bid2luHbwMS85Sh7kSBjZA9Z4bmLWaMp4Bpb6qWBXeFLkyViwAHmPxrLMSn2ep/WW5gC
         dIYA==
ARC-Authentication-Results: i=1; mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=U6D12L8c;
       spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18])
        by mx.google.com with ESMTP id rl4si3673179ejb.648.2020.07.27.13.55.24;
        Mon, 27 Jul 2020 13:55:47 -0700 (PDT)
Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Authentication-Results: mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=U6D12L8c;
       spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1727858AbgG0UxG (ORCPT <rfc822;wxiaokuan@gmail.com> + 99 others);
        Mon, 27 Jul 2020 16:53:06 -0400
Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:9062 "EHLO
        hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1727828AbgG0Uvx (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Mon, 27 Jul 2020 16:51:53 -0400
Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA)
        id <B5f1f3e5b0001>; Mon, 27 Jul 2020 13:51:39 -0700
Received: from hqmail.nvidia.com ([172.20.161.6])
  by hqpgpgate102.nvidia.com (PGP Universal service);
  Mon, 27 Jul 2020 13:51:53 -0700
X-PGP-Universal: processed;
        by hqpgpgate102.nvidia.com on Mon, 27 Jul 2020 13:51:53 -0700
Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL111.nvidia.com
 (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 27 Jul
 2020 20:51:52 +0000
Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL101.nvidia.com
 (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend
 Transport; Mon, 27 Jul 2020 20:51:52 +0000
Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.168.236]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121)
        id <B5f1f3e680001>; Mon, 27 Jul 2020 13:51:52 -0700
From:   Sowjanya Komatineni <skomatineni@nvidia.com>
To:     <skomatineni@nvidia.com>, <thierry.reding@gmail.com>,
        <jonathanh@nvidia.com>, <frankc@nvidia.com>, <hverkuil@xs4all.nl>,
        <sakari.ailus@iki.fi>, <robh+dt@kernel.org>,
        <helen.koike@collabora.com>
CC:     <digetx@gmail.com>, <sboyd@kernel.org>,
        <gregkh@linuxfoundation.org>, <linux-media@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <linux-i2c@vger.kernel.org>
Subject: [RFC PATCH v5 04/14] i2c: tegra: Fix runtime resume to re-init VI I2C
Date:   Mon, 27 Jul 2020 13:57:22 -0700
Message-ID: <1595883452-17343-5-git-send-email-skomatineni@nvidia.com>
X-Mailer: git-send-email 2.7.4
In-Reply-To: <1595883452-17343-1-git-send-email-skomatineni@nvidia.com>
References: <1595883452-17343-1-git-send-email-skomatineni@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
        t=1595883099; bh=fdSdZA32H9070W4hnaqJFVzgkqKlU3QuQtTIBT8xq9Q=;
        h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer:
         In-Reply-To:References:X-NVConfidentiality:MIME-Version:
         Content-Type;
        b=U6D12L8cnKUFE9KLWhE2389dwIYvW5JJG65tHF9NaG5bwcC3P6sxIZ2vqpsxLUus4
         nDfkmoPV6Circirq0oafXqmKR8QqQvmVfn1MVsflmeb3EgyBNeSMeXE6xMce6wKvPb
         0hPBGQeIhIJFJmNdpOhdSXyjAO7KoLU33arr/C0xLfRdaKuuIj8qrgUzQeJkezOkNp
         R81ekKh9+KsrCOghvyrgehQ20zkWtt2zk+U2h2/64opwAuipYcig9z9nNVygrB2kTK
         /7RAAw5eJOrHcUjhvhjdt9RQ7OgiuhwbBX7s+gvnTVhPdAiKm+mMRGAJYyeMn4495Z
         kLrWEe3WFAL7g==
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

VI I2C is on host1x bus and is part of VE power domain.

During suspend/resume VE power domain goes through power off/on.

So, controller reset followed by i2c re-initialization is required
after the domain power up.

This patch fixes it.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/i2c/busses/i2c-tegra.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 7b93c45..1bf3666 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -293,6 +293,8 @@ struct tegra_i2c_dev {
 	bool is_curr_atomic_xfer;
 };
 
+static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev, bool clk_reinit);
+
 static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
 		       unsigned long reg)
 {
@@ -675,8 +677,22 @@ static int __maybe_unused tegra_i2c_runtime_resume(struct device *dev)
 		goto disable_slow_clk;
 	}
 
+	/*
+	 * VI I2C device is attached to VE power domain which goes through
+	 * power ON/OFF during PM runtime resume/suspend. So, controller
+	 * should go through reset and need to re-initialize after power
+	 * domain ON.
+	 */
+	if (i2c_dev->is_vi) {
+		ret = tegra_i2c_init(i2c_dev, true);
+		if (ret)
+			goto disable_div_clk;
+	}
+
 	return 0;
 
+disable_div_clk:
+	clk_disable(i2c_dev->div_clk);
 disable_slow_clk:
 	clk_disable(i2c_dev->slow_clk);
 disable_fast_clk:
-- 
2.7.4