Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
MIME-Version: 1.0
References: <cover.7a1aa1784976093af26cb31fd283cf5b3ed568bb.1594230107.git-series.maxime@cerno.tech>
 <bb369aede3a6d0463805faabeb5f598a369b54bf.1594230107.git-series.maxime@cerno.tech>
In-Reply-To: <bb369aede3a6d0463805faabeb5f598a369b54bf.1594230107.git-series.maxime@cerno.tech>
From:   Dave Stevenson <dave.stevenson@raspberrypi.com>
Date:   Tue, 28 Jul 2020 11:30:16 +0100
Message-ID: <CAPY8ntBSux3gAU1+LV_wA5pLwaovNy1cwZY7KZkb8Er8-MnNPA@mail.gmail.com>
Subject: Re: [PATCH v4 21/78] drm/vc4: crtc: Move PV dump to config_pv
To:     Maxime Ripard <maxime@cerno.tech>
Cc:     Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
        Eric Anholt <eric@anholt.net>,
        DRI Development <dri-devel@lists.freedesktop.org>,
        linux-rpi-kernel@lists.infradead.org,
        bcm-kernel-feedback-list@broadcom.com,
        linux-arm-kernel@lists.infradead.org,
        LKML <linux-kernel@vger.kernel.org>,
        Tim Gover <tim.gover@raspberrypi.com>,
        Phil Elwell <phil@raspberrypi.com>
Content-Type: text/plain; charset="UTF-8"
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Hi Maxime

On Wed, 8 Jul 2020 at 18:43, Maxime Ripard <maxime@cerno.tech> wrote:
>
> Now that we only configure the PixelValve in vc4_crtc_config_pv, it doesn't
> really make much sense to dump its register content in its caller.
>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

> ---
>  drivers/gpu/drm/vc4/vc4_crtc.c | 26 ++++++++++++--------------
>  1 file changed, 12 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
> index c2ab907611e3..181d3fd57bc7 100644
> --- a/drivers/gpu/drm/vc4/vc4_crtc.c
> +++ b/drivers/gpu/drm/vc4/vc4_crtc.c
> @@ -290,6 +290,14 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc)
>                        vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
>         u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
>         u8 ppc = pv_data->pixels_per_clock;
> +       bool debug_dump_regs = false;
> +
> +       if (debug_dump_regs) {
> +               struct drm_printer p = drm_info_printer(&vc4_crtc->pdev->dev);
> +               dev_info(&vc4_crtc->pdev->dev, "CRTC %d regs before:\n",
> +                        drm_crtc_index(crtc));
> +               drm_print_regset32(&p, &vc4_crtc->regset);
> +       }
>
>         vc4_crtc_pixelvalve_reset(crtc);
>
> @@ -359,30 +367,20 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc)
>                    PV_CONTROL_WAIT_HSTART |
>                    VC4_SET_FIELD(vc4_encoder->clock_select,
>                                  PV_CONTROL_CLK_SELECT));
> -}
> -
> -static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
> -{
> -       struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
> -       bool debug_dump_regs = false;
>
>         if (debug_dump_regs) {
>                 struct drm_printer p = drm_info_printer(&vc4_crtc->pdev->dev);
> -               dev_info(&vc4_crtc->pdev->dev, "CRTC %d regs before:\n",
> +               dev_info(&vc4_crtc->pdev->dev, "CRTC %d regs after:\n",
>                          drm_crtc_index(crtc));
>                 drm_print_regset32(&p, &vc4_crtc->regset);
>         }
> +}
>
> +static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
> +{
>         vc4_crtc_config_pv(crtc);
>
>         vc4_hvs_mode_set_nofb(crtc);
> -
> -       if (debug_dump_regs) {
> -               struct drm_printer p = drm_info_printer(&vc4_crtc->pdev->dev);
> -               dev_info(&vc4_crtc->pdev->dev, "CRTC %d regs after:\n",
> -                        drm_crtc_index(crtc));
> -               drm_print_regset32(&p, &vc4_crtc->regset);
> -       }
>  }
>
>  static void require_hvs_enabled(struct drm_device *dev)
> --
> git-series 0.9.1