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[23.128.96.18]) by mx.google.com with ESMTP id d9si3194002edv.44.2020.07.30.07.20.33; Thu, 30 Jul 2020 07:20:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@eclypsium.com header.s=google header.b=ajYisd7S; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=eclypsium.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728306AbgG3OSd (ORCPT + 99 others); Thu, 30 Jul 2020 10:18:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726794AbgG3OSc (ORCPT ); Thu, 30 Jul 2020 10:18:32 -0400 Received: from mail-qk1-x743.google.com (mail-qk1-x743.google.com [IPv6:2607:f8b0:4864:20::743]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 584E6C061574 for ; Thu, 30 Jul 2020 07:18:32 -0700 (PDT) Received: by mail-qk1-x743.google.com with SMTP id l6so25686971qkc.6 for ; Thu, 30 Jul 2020 07:18:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=eclypsium.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=XZbJJB2Vd7z56HA7iaeVyLLV94QolOdPT5I5Lnt/lZQ=; b=ajYisd7S9lMISpmj4yTD1guZg5Hd2IkN+h3NlyEOzRtlvrIgkGLifmMGxwp1h27nIC DmY758wMp1tqUHR1ddz5M59vrwtpyXhRrnppwWk2HqR+BOBLQEBPCkaCdvF5kjnmqkzx wiyX8jzOUI2hOo5EBoQf/R5yVQPlA5xhinTUzvt7SdRhrZga21gPabubZN54/pccIHZJ sMNRKZh2ENDhLuV2kQc6+N1xMO1LaJ1JlKjgTsaSwSCjmJeAqHOEJdQTBLhDYlPGErkm 8UuarO+tg1nolZW9zlEK4MDxlU6WQscwrfB4CsaL/3X5fFjW5TWuYDCrvlRGNmBFhQFf V5tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=XZbJJB2Vd7z56HA7iaeVyLLV94QolOdPT5I5Lnt/lZQ=; b=FsWQwmXnPJSeVhX5Tjk4jh2Bc5vjT2U97BSLeK54goPd5LmzNo+oVli3tOZ0bwr3Xi HWDhQs8x48ZtRiq3w/LvHBfXLPGDdpVRkE5HU/aTzy/rxXftR/fhKw9DjbdUT+lQxiE7 51pk0LZkGk//J6lPPP8aJ8sx8NaeMF+6PT6sPsNPzR0zIlK83UftDD6TPpBTsMb+45b7 gGAVEIKNwrGGkt0OeJx2vbgVAJnRsWK97wxyJKriX2Hs9t55ECm3wAEq9qTLEFSgQnmT T9Bl/cU5soVgwPF/JPLbDqpIONwohg4Vas7VFfZvHrqTSxqLrzJ5T7YhhlEryE6/eKf0 WexA== X-Gm-Message-State: AOAM531Or6MZiSH/l0MkIcCsM9YOcUrgT+sqalysaB1TawuXKcVUcciR vl8ebwAjHqEuFCjwiWSP79V5hyRt/yjTxPdp+F/L9w== X-Received: by 2002:a37:9f0a:: with SMTP id i10mr7133510qke.368.1596118711204; Thu, 30 Jul 2020 07:18:31 -0700 (PDT) MIME-Version: 1.0 References: <20200724212853.11601-1-daniel.gutson@eclypsium.com> <20200725055649.GA1047853@kroah.com> <20200726071723.GB441916@kroah.com> <20200730053108.GA3861609@kroah.com> In-Reply-To: From: Daniel Gutson Date: Thu, 30 Jul 2020 11:18:20 -0300 Message-ID: Subject: Re: [PATCH] Module argument to control whether intel-spi-pci attempts to turn the SPI flash chip writeable To: Arnd Bergmann Cc: Greg Kroah-Hartman , Tudor Ambarus , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Mika Westerberg , Boris Brezillon , linux-mtd , "linux-kernel@vger.kernel.org" , Alex Bazhaniuk , Richard Hughes Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 30, 2020 at 11:09 AM Arnd Bergmann wrote: > > On Thu, Jul 30, 2020 at 2:21 PM Daniel Gutson wrot= e: > > El jue., 30 jul. 2020 2:31 a. m., Greg Kroah-Hartman escribi=C3=B3: > >> > >> Again, module parameters are working on a per-chunk-of-code basis, whi= le > >> you want to work on a per-device basis, > > > > > > I think there is a misunderstanding. What I want is to control (turn o= n or off) is a very specific code snippet that provides the "functionality"= of trying to turn the chip writable. The rest of the device driver is fine= . > > I assume that the one that doesn't understand is me. > > > > I looked at the source code again and found that the existing module > parameter applies to both the platform and pci device front-ends, both > of which go through > > /* Prevent writes if not explicitly enabled */ > if (!ispi->writeable || !writeable) > ispi->nor.mtd.flags &=3D ~MTD_WRITEABLE; > I think you missed https://elixir.bootlin.com/linux/latest/source/drivers/mtd/spi-nor/controll= ers/intel-spi-pci.c#L44 /* Try to make the chip read/write */ pci_read_config_dword(pdev, BCR, &bcr); if (!(bcr & BCR_WPD)) { bcr |=3D BCR_WPD; pci_write_config_dword(pdev, BCR, bcr); pci_read_config_dword(pdev, BCR, &bcr); } in the probe function, and is executed always and unconditionally. /* Try to make the chip read/write */ pci_read_config_dword(pdev, BCR, &bcr); if (!(bcr & BCR_WPD)) { bcr |=3D BCR_WPD; pci_write_config_dword(pdev, BCR, bcr); pci_read_config_dword(pdev, BCR, &bcr); } > Setting the PCI device writable in hardware makes it possible to > actually write to it *only* if the module parameter is also set to '1'. > One might disagree with that design, but I don't think your patch > would make it any better, it just means one would have to set > two module parameters instead of one. > > Arnd --=20 Daniel Gutson Argentina Site Director Enginieering Director Eclypsium Below The Surface: Get the latest threat research and insights on firmware and supply chain threats from the research team at Eclypsium. https://eclypsium.com/research/#threatreport