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From:   Andy Shevchenko <andy.shevchenko@gmail.com>
Date:   Fri, 31 Jul 2020 11:44:34 +0300
Message-ID: <CAHp75Vere3B3CJ0fWkPL2h=qfgYrq93wON86_wmqa2FaK8E3=A@mail.gmail.com>
Subject: Re: [PATCH v2 1/1] x86/tsr: Fix tsc frequency enumeration failure on
 Lightning Mountain SoC
To:     Dilip Kota <eswara.kota@linux.intel.com>
Cc:     "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        "H. Peter Anvin" <hpa@zytor.com>,
        "Tanwar, Rahul" <rahul.tanwar@linux.intel.com>,
        Hans de Goede <hdegoede@redhat.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Andy Shevchenko <andy@infradead.org>, cheol.yong.kim@intel.com,
        chuanhua.lei@linux.intel.com, qi-ming.wu@intel.com
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On Thu, Jul 30, 2020 at 1:01 PM Dilip Kota <eswara.kota@linux.intel.com> wrote:
>
> Frequency descriptor of Lightning Mountain SoC doesn't have all the
> frequency entries so resulting in the below failure causing kernel hang.
>
> [    0.000000] Error MSR_FSB_FREQ index 15 is unknown
> [    0.000000] tsc: Fast TSC calibration failed
>
> So, add all the frequency entries in the Lightning Mountain SoC frequency
> descriptor.
>

I'm wondering if you get Tony's blessing for this change...
In any case, one nit-pick below and Cc Tony for the next version.

FWIW,
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> Fixes: 0cc5359d8fd45 ("x86/cpu: Update init data for new Airmont CPU model")
> Fixes: 812c2d7506fd ("x86/tsc_msr: Use named struct initializers")
> Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>


> ---
> Changes on v2:
>   Add description in the comments explaining about frequency entries.
>
>  arch/x86/kernel/tsc_msr.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
> index 4fec6f3a1858b2..83b54c65aad2f3 100644
> --- a/arch/x86/kernel/tsc_msr.c
> +++ b/arch/x86/kernel/tsc_msr.c
> @@ -133,10 +133,15 @@ static const struct freq_desc freq_desc_ann = {
>         .mask = 0x0f,
>  };
>
> -/* 24 MHz crystal? : 24 * 13 / 4 = 78 MHz */
> +/*
> + * 24 MHz crystal? : 24 * 13 / 4 = 78 MHz
> + * Frequency step for Lightning Mountain SoC is fixed to 78 MHz,
> + * so all the frequency entries are 78000.
> + */
>  static const struct freq_desc freq_desc_lgm = {
>         .use_msr_plat = true,
> -       .freqs = { 78000, 78000, 78000, 78000, 78000, 78000, 78000, 78000 },

> +       .freqs = { 78000, 78000, 78000, 78000, 78000, 78000, 78000, 78000, 78000,
> +                  78000, 78000, 78000, 78000, 78000, 78000, 78000 },

Keep 8 per line (or 4 per line).

>         .mask = 0x0f,
>  };
>
> --
> 2.11.0
>


-- 
With Best Regards,
Andy Shevchenko