Received: by 2002:a25:ca44:0:0:0:0:0 with SMTP id a65csp2518759ybg; Fri, 31 Jul 2020 02:05:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyFgTZQ1LdQQGbummp8BYtJHkVdh3iYMkF7HvcYyEhzw+1cMKrgfNddefPFpIHiyIeSMwSD X-Received: by 2002:a17:906:c18d:: with SMTP id g13mr2937883ejz.239.1596186301754; Fri, 31 Jul 2020 02:05:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1596186301; cv=none; d=google.com; s=arc-20160816; b=tkkkSaFtFiU5X03vmyKbwwIUfPUwz1DVFvVeiESYqhvT9jGXwCpVchu386jZzxYpMs 8ia/WtkYIj0G4HW0jxvkRRgL7/BXb/kx0bwo+9jo1VIrIJuHcX8lDoQMQqqWAotCUkz+ kOUJHqdpOUaKPdAB0+b5pXyvj0hkaHxDOwq8DDGASRRnzGos97N2y4EoUL5enIpGF6cI au54220DLJR3DDqgqzSPf2fqdNEmG1X4gUZuSoCll+yH5OSgR3GQ/LffuwWw5UJvDz1+ k+73zQWI492f9+Awct65NrcUmjnIlfft1CYJzW3wqhumsS0zHqmO9Hf3UAZIxhgyXQAr VQ8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:dkim-signature:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from; bh=5U56MbpoGgbizDY87xBQZF5BWeIIcAyUuev+l62V8Co=; b=W55mu8gpjsxfKVEEvL+WgrnlYkAk7kYkuuvpkeAYrku9SmEkHnoAK8Kg/KdaNvD9K1 0iZcEMsKF25tPgwdsrRevEHH5K1TYi47pPuRnhQnvi/EgxnBSL/TRuuiCj0lWZ1fJQ8w 9UEZ2irriAAHCHX0WYQmg0YtynEwQUZKURSbF81ryvQUjGHMZCkLIGSVZg1t7OycJhCJ /MLuLjTJ4Yr+1jjHP1+JmFpVUHyC3UE1n0LlPkIBAXBKzEXjnm2nvH4gQW4I0KpaW8i2 VL6PHnGhQr5d6hrTZAw3fJOh8OQiwlvQmwBHr61gxJp3IR4rx9gpRjEtsWTDa55HJ+Ep cQQQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=HaVarrBS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d1si5048117edl.585.2020.07.31.02.04.39; Fri, 31 Jul 2020 02:05:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=HaVarrBS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732167AbgGaJDo (ORCPT + 99 others); Fri, 31 Jul 2020 05:03:44 -0400 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:19125 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732030AbgGaJC5 (ORCPT ); Fri, 31 Jul 2020 05:02:57 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 31 Jul 2020 02:01:22 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 31 Jul 2020 02:02:56 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 31 Jul 2020 02:02:56 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 31 Jul 2020 09:02:56 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Fri, 31 Jul 2020 09:02:56 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.167.221]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Fri, 31 Jul 2020 02:02:56 -0700 From: Sowjanya Komatineni To: , , , , , , , CC: , , , , , , , Subject: [RFC PATCH v6 03/10] media: tegra-video: Update format lookup to offset based Date: Fri, 31 Jul 2020 02:02:42 -0700 Message-ID: <1596186169-18729-4-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1596186169-18729-1-git-send-email-skomatineni@nvidia.com> References: <1596186169-18729-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1596186082; bh=5U56MbpoGgbizDY87xBQZF5BWeIIcAyUuev+l62V8Co=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=HaVarrBScuUl2g24Cmi3KwvpBdXdSe+Ewvyl900IBeYqVh6okqW4CbJUtefW0+Z9m SRMJIR0wvaczbOF61W5yv2Y6J+lXmswak4KG0wAdv9bfKWhgsUkMd4AVT7nauGL7FU vE3GlzrdceHl5Gf4ro/0c/Iu5Wmq+E88RvGLTERXTrbRund5dNyIdVSSr6xjltSxlu eiR/RveZQMGpInbb2qNaNAap+D4cNh9JP1N8+Wf0+HBlKiDR+Zo/4hNuSfdKI1HXjQ sPb2nZzICns5IdsVSKN9Rt2QGmD6a4tUSbpIYo38UQHbiHzthvDEdaPPYer8H1xfKJ s+MhPdNT02GyA== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Tegra VI supported video formats are more for non TPG and there can be multiple pixel formats for the same media bus format. This patch updates the helper function for format lookup based on mbus code from pre-defined Tegra supported format list to look from the specified list index offset. Offset based look up is used with sensor device graph (non TPG) where format enumeration can list all supported formats for the specific sensor mbus codes. Signed-off-by: Sowjanya Komatineni --- drivers/staging/media/tegra-video/vi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 0197f4e..52d751f 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -53,11 +53,12 @@ to_tegra_channel_buffer(struct vb2_v4l2_buffer *vb) } static int tegra_get_format_idx_by_code(struct tegra_vi *vi, - unsigned int code) + unsigned int code, + unsigned int offset) { unsigned int i; - for (i = 0; i < vi->soc->nformats; ++i) { + for (i = offset; i < vi->soc->nformats; ++i) { if (vi->soc->video_formats[i].code == code) return i; } @@ -598,11 +599,12 @@ static void vi_tpg_fmts_bitmap_init(struct tegra_vi_channel *chan) bitmap_zero(chan->tpg_fmts_bitmap, MAX_FORMAT_NUM); index = tegra_get_format_idx_by_code(chan->vi, - MEDIA_BUS_FMT_SRGGB10_1X10); + MEDIA_BUS_FMT_SRGGB10_1X10, 0); bitmap_set(chan->tpg_fmts_bitmap, index, 1); index = tegra_get_format_idx_by_code(chan->vi, - MEDIA_BUS_FMT_RGB888_1X32_PADHI); + MEDIA_BUS_FMT_RGB888_1X32_PADHI, + 0); bitmap_set(chan->tpg_fmts_bitmap, index, 1); } -- 2.7.4