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[118.171.128.242]) by smtp.gmail.com with ESMTPSA id q73sm11462978pjc.11.2020.07.31.22.48.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2020 22:48:33 -0700 (PDT) From: Axel Lin To: Mark Brown Cc: Andy Gross , Bjorn Andersson , "Angelo G . Del Regno" , Liam Girdwood , linux-kernel@vger.kernel.org, Axel Lin Subject: [PATCH] regulator: qcom_spmi: Improve readability for setting up enable/mode pin control Date: Sat, 1 Aug 2020 13:48:20 +0800 Message-Id: <20200801054820.134859-1-axel.lin@ingics.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org By checking data->pin_ctrl_enable / data->pin_ctrl_hpm flags first, then use switch-case to improve readability. Signed-off-by: Axel Lin --- drivers/regulator/qcom_spmi-regulator.c | 70 ++++++++++++------------- 1 file changed, 34 insertions(+), 36 deletions(-) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c index 5ee7c5305d95..05080483fe1b 100644 --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -1633,45 +1633,43 @@ static int spmi_regulator_init_registers(struct spmi_regulator *vreg, return ret; /* Set up enable pin control. */ - if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS - || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO - || type == SPMI_REGULATOR_LOGICAL_TYPE_VS) - && !(data->pin_ctrl_enable - & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) { - ctrl_reg[SPMI_COMMON_IDX_ENABLE] &= - ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; - ctrl_reg[SPMI_COMMON_IDX_ENABLE] |= - data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; + if (!(data->pin_ctrl_enable & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) { + switch (type) { + case SPMI_REGULATOR_LOGICAL_TYPE_SMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_LDO: + case SPMI_REGULATOR_LOGICAL_TYPE_VS: + ctrl_reg[SPMI_COMMON_IDX_ENABLE] &= + ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; + ctrl_reg[SPMI_COMMON_IDX_ENABLE] |= + data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; + break; + default: + break; + } } /* Set up mode pin control. */ - if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS - || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO) - && !(data->pin_ctrl_hpm - & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { - ctrl_reg[SPMI_COMMON_IDX_MODE] &= - ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK; - ctrl_reg[SPMI_COMMON_IDX_MODE] |= - data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK; - } - - if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS - && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { - ctrl_reg[SPMI_COMMON_IDX_MODE] &= - ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; - ctrl_reg[SPMI_COMMON_IDX_MODE] |= - data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; - } - - if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS - || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS - || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO) - && !(data->pin_ctrl_hpm - & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { - ctrl_reg[SPMI_COMMON_IDX_MODE] &= - ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; - ctrl_reg[SPMI_COMMON_IDX_MODE] |= - data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; + if (!(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { + switch (type) { + case SPMI_REGULATOR_LOGICAL_TYPE_SMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_LDO: + ctrl_reg[SPMI_COMMON_IDX_MODE] &= + ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK; + ctrl_reg[SPMI_COMMON_IDX_MODE] |= + data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK; + break; + case SPMI_REGULATOR_LOGICAL_TYPE_VS: + case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS: + case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO: + ctrl_reg[SPMI_COMMON_IDX_MODE] &= + ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; + ctrl_reg[SPMI_COMMON_IDX_MODE] |= + data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; + break; + default: + break; + } } /* Write back any control register values that were modified. */ -- 2.25.1