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[23.128.96.18]) by mx.google.com with ESMTP id dc26si9043829edb.203.2020.08.02.23.21.35; Sun, 02 Aug 2020 23:21:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=qH73Jgme; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726989AbgHCGRL (ORCPT + 99 others); Mon, 3 Aug 2020 02:17:11 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:48273 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725831AbgHCGRL (ORCPT ); Mon, 3 Aug 2020 02:17:11 -0400 X-UUID: efcf9d132f214aa6bd25bee79f80de3e-20200803 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=AxpoOF2EVqGDrkSgJE/mVxWLigpKfOKa6+0MTFuhn4E=; b=qH73JgmevQF06n41to3tw+3EOSCUUtU5t1F3atsir4Kwa3q3ZLt7JQDqNPsGGRIwoTkYUMP28zvdMcbRd3NS5eu1bnjmLuboHMDGgS+2IFGREpBjD5aqDHuOHgeZ6GJijkkIJP0Fjd3m859y9BwYfKpJzNq9dD1lfxdAED0b030=; X-UUID: efcf9d132f214aa6bd25bee79f80de3e-20200803 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1838103932; Mon, 03 Aug 2020 14:17:07 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 3 Aug 2020 14:17:05 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 3 Aug 2020 14:17:06 +0800 From: Crystal Guo To: , , CC: , , , , , , , , Subject: [v2,0/6] introduce TI reset controller for MT8192 SoC Date: Mon, 3 Aug 2020 14:15:05 +0800 Message-ID: <20200803061511.29555-1-crystal.guo@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Content-Transfer-Encoding: base64 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org djEgY2hhbmdlczoNCmh0dHBzOi8vcGF0Y2h3b3JrLmtlcm5lbC5vcmcvcGF0Y2gvMTE2OTA1MjMv DQpodHRwczovL3BhdGNod29yay5rZXJuZWwub3JnL3BhdGNoLzExNjkwNTI3Lw0KDQpDcnlzdGFs IEd1byAoNik6DQogIGR0LWJpbmRpbmc6IHJlc2V0LWNvbnRyb2xsZXI6IHRpOiBhZGQgYXNzZXJ0 LWRlYXNzZXJ0LXRvZ2V0aGVyDQogICAgcHJvcGVydHkNCiAgZHQtYmluZGluZzogcmVzZXQtY29u dHJvbGxlcjogdGk6IGFkZCB1cGRhdGUtZm9yY2UgcHJvcGVydHkNCiAgZHQtYmluZGluZzogcmVz ZXQtY29udHJvbGxlcjogdGk6IGFkZCBnZW5lcmljLXJlc2V0IHRvIGNvbXBhdGlibGUNCiAgcmVz ZXQtY29udHJvbGxlcjogdGk6IGludHJvZHVjZSBhIG5ldyByZXNldCBoYW5kbGVyDQogIHJlc2V0 LWNvbnRyb2xsZXI6IHRpOiBJbnRyb2R1Y2UgZm9yY2UtdXBkYXRlIG1ldGhvZA0KICBhcm02NDog ZHRzOiBtdDgxOTI6IGFkZCBpbmZyYWNmZ19yc3Qgbm9kZQ0KDQogLi4uL2JpbmRpbmdzL3Jlc2V0 L3RpLXN5c2Nvbi1yZXNldC50eHQgICAgICAgIHwgIDUgKysrDQogYXJjaC9hcm02NC9ib290L2R0 cy9tZWRpYXRlay9tdDgxOTIuZHRzaSAgICAgIHwgMTMgKysrKysrLQ0KIGRyaXZlcnMvcmVzZXQv cmVzZXQtdGktc3lzY29uLmMgICAgICAgICAgICAgICB8IDM1ICsrKysrKysrKysrKysrKysrLS0N CiAzIGZpbGVzIGNoYW5nZWQsIDUwIGluc2VydGlvbnMoKyksIDMgZGVsZXRpb25zKC0pDQoNCg==