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[23.128.96.18]) by mx.google.com with ESMTP id ay22si11595111edb.569.2020.08.03.11.01.44; Mon, 03 Aug 2020 11:02:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@wdc.com header.s=dkim.wdc.com header.b="DDS/iYyO"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=wdc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728699AbgHCR7g (ORCPT + 99 others); Mon, 3 Aug 2020 13:59:36 -0400 Received: from esa4.hgst.iphmx.com ([216.71.154.42]:64734 "EHLO esa4.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728606AbgHCR7T (ORCPT ); Mon, 3 Aug 2020 13:59:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1596477558; x=1628013558; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qPmtegxxbSB9RTlj4BBlMzdfmESXwNOsCOxFYG1zCtU=; b=DDS/iYyOzQGyLaJo9TjRmDvPqerGZWY2CrwCIkGsyqHqlWXyjEKEIur8 v1yuI1DGkCOHoAUMXzKbIbJmddowhVvLCxrL4kuBGpd+fXyJskB43RS0O eIt+87lNJ/xhbGFKnYArEw5LmiDEKIiYsQAtsWZuDI6DSKqCK2pkEoF78 ZNQzv8XO29qbmalCT2b2cnmuMnKk+7wVfcX79cTVDEbrOFKkjdMM7M5Ay z9BMPjuVRkM8Ewe5zEzVCgxQ5eWIU/uHfiAZiPe931olzG6r7w6Cup6rB GUVH1X7hYAZclmDsnAoh6sTOaEYwvAWMwQ5XgfvyURZZj/PMf2wY6gLVO g==; IronPort-SDR: 6iPYMzoH1Jh8d+/5u8yW8wzoLmyL76h/dSESfQkOARKf6OrXVbEjeKMvS/yNLwJ1FVxYutIzNZ zlY1m1pyx5AnDwjDvVgt1IJXov0XI1Yd6XYMmv/6R7XFIUze5njBBnThvDrkBkawMdMPV28ZC+ kZ7EisT/IMNEjWBMFWcgY207/g4bamUABHiHl4uhTboYe38LfjbZ5ywPksDGABfhnNARF9ZhpO ZrRT80UZyw5sShg4CLNMf04ZT1LckE213jZmkM/E7LRIS5Ew/pdtKhh11hYTpMQc1TmzlyWf0A Uww= X-IronPort-AV: E=Sophos;i="5.75,430,1589212800"; d="scan'208";a="144033184" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 04 Aug 2020 01:59:06 +0800 IronPort-SDR: C5ZawVlqjA8Q14PscUal99ZcGUk7D/5xHy97TELczxeytcZjngeTw7FAZy6i4Wf3EhLxthrZ8d WVTwCaPGawIg== Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Aug 2020 10:47:08 -0700 IronPort-SDR: UhN4Hz3RhIS2TGFKWzyLUGEL5Rl/ZPk/mOR0AYzlA2gP8UjJrOWPq+7kvyHh2CZEt0zFX4mrMY 0V9dAC21SUMA== WDCIronportException: Internal Received: from cnf007830.ad.shared (HELO jedi-01.hgst.com) ([10.86.58.196]) by uls-op-cesaip01.wdc.com with ESMTP; 03 Aug 2020 10:59:05 -0700 From: Atish Patra To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org Cc: Atish Patra , Albert Ou , Anup Patel , Kefeng Wang , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Alexander Graf , Paolo Bonzini , Alistair Francis Subject: [PATCH 4/6] RISC-V: Add SBI v0.2 base extension Date: Mon, 3 Aug 2020 10:58:44 -0700 Message-Id: <20200803175846.26272-5-atish.patra@wdc.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200803175846.26272-1-atish.patra@wdc.com> References: <20200803175846.26272-1-atish.patra@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org SBI v0.2 base extension defined to allow backward compatibility and probing of future extensions. This is also the only mandatory SBI extension that must be implemented by SBI implementors. Signed-off-by: Atish Patra --- arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 + arch/riscv/include/asm/sbi.h | 8 +++ arch/riscv/kvm/Makefile | 4 +- arch/riscv/kvm/vcpu_sbi.c | 3 ++ arch/riscv/kvm/vcpu_sbi_base.c | 73 +++++++++++++++++++++++++++ 5 files changed, 88 insertions(+), 2 deletions(-) create mode 100644 arch/riscv/kvm/vcpu_sbi_base.c diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h index 743c71f0c331..e208c8ac57fe 100644 --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h @@ -9,6 +9,8 @@ #ifndef __RISCV_KVM_VCPU_SBI_H__ #define __RISCV_KVM_VCPU_SBI_H__ +#define KVM_SBI_IMPID 3 + #define KVM_SBI_VERSION_MAJOR 0 #define KVM_SBI_VERSION_MINOR 2 diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 2355515785eb..7d8f2b389253 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -27,6 +27,14 @@ enum sbi_ext_id { SBI_EXT_IPI = 0x735049, SBI_EXT_RFENCE = 0x52464E43, SBI_EXT_HSM = 0x48534D, + + /* Experimentals extensions must lie within this range */ + SBI_EXT_EXPERIMENTAL_START = 0x0800000, + SBI_EXT_EXPERIMENTAL_END = 0x08FFFFFF, + + /* Vendor extensions must lie within this range */ + SBI_EXT_VENDOR_START = 0x09000000, + SBI_EXT_VENDOR_END = 0x09FFFFFF, }; enum sbi_ext_base_fid { diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile index 8efb78faab5a..a95c91ba9a51 100644 --- a/arch/riscv/kvm/Makefile +++ b/arch/riscv/kvm/Makefile @@ -9,6 +9,6 @@ ccflags-y := -Ivirt/kvm -Iarch/riscv/kvm kvm-objs := $(common-objs-y) kvm-objs += main.o vm.o vmid.o tlb.o mmu.o -kvm-objs += vcpu.o vcpu_exit.o vcpu_switch.o vcpu_timer.o vcpu_sbi.o vcpu_sbi_legacy.o - +kvm-objs += vcpu.o vcpu_exit.o vcpu_switch.o vcpu_timer.o +kvm-objs += vcpu_sbi.o vcpu_sbi_base.o vcpu_sbi_legacy.o obj-$(CONFIG_KVM) += kvm.o diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index 85bb7491c0e0..bb50d63f78e7 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -31,8 +31,11 @@ static int kvm_linux_err_map_sbi(int err) } extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_legacy; +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_base; + static const struct kvm_vcpu_sbi_extension *sbi_ext[] = { &vcpu_sbi_ext_legacy, + &vcpu_sbi_ext_base, }; void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run) diff --git a/arch/riscv/kvm/vcpu_sbi_base.c b/arch/riscv/kvm/vcpu_sbi_base.c new file mode 100644 index 000000000000..025d0eae50b0 --- /dev/null +++ b/arch/riscv/kvm/vcpu_sbi_base.c @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * Copyright (c) 2020 Western Digital Corporation or its affiliates. + * + * Authors: + * Atish Patra + */ + +#include +#include +#include +#include +#include +#include +#include + +static int kvm_sbi_ext_base_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, + unsigned long *out_val, + struct kvm_cpu_trap *trap, bool *exit) +{ + int ret = 0; + struct kvm_cpu_context *cp = &vcpu->arch.guest_context; + struct sbiret ecall_ret; + + if (!cp) + return -EINVAL; + + switch (cp->a6) { + case SBI_EXT_BASE_GET_SPEC_VERSION: + *out_val = (KVM_SBI_VERSION_MAJOR << + SBI_SPEC_VERSION_MAJOR_SHIFT) | + KVM_SBI_VERSION_MINOR; + break; + case SBI_EXT_BASE_GET_IMP_ID: + *out_val = KVM_SBI_IMPID; + break; + case SBI_EXT_BASE_GET_IMP_VERSION: + *out_val = 0; + break; + case SBI_EXT_BASE_PROBE_EXT: + *out_val = kvm_vcpu_sbi_find_ext(cp->a0) ? 1 : 0; + if ((!*out_val) && + ((cp->a0 >= SBI_EXT_EXPERIMENTAL_START && + cp->a0 <= SBI_EXT_EXPERIMENTAL_END) || + ((cp->a0 >= SBI_EXT_VENDOR_START && + cp->a0 <= SBI_EXT_VENDOR_END)))) { + /* For experimental/vendor extensions forward to the userspace*/ + kvm_riscv_vcpu_sbi_forward(vcpu, run); + *exit = true; + } + break; + case SBI_EXT_BASE_GET_MVENDORID: + case SBI_EXT_BASE_GET_MARCHID: + case SBI_EXT_BASE_GET_MIMPID: + ecall_ret = sbi_ecall(SBI_EXT_BASE, cp->a6, 0, 0, 0, 0, 0, 0); + if (!ecall_ret.error) + *out_val = ecall_ret.value; + /*TODO: We are unnecessarily converting the error twice */ + ret = sbi_err_map_linux_errno(ecall_ret.error); + break; + default: + ret = -ENOTSUPP; + break; + } + + return ret; +} + +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_base = { + .extid_start = SBI_EXT_BASE, + .extid_end = SBI_EXT_BASE, + .handler = kvm_sbi_ext_base_handler, +}; -- 2.24.0