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[209.85.222.50]) by smtp.gmail.com with ESMTPSA id n20sm881803vsr.6.2020.08.03.11.09.30 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 03 Aug 2020 11:09:31 -0700 (PDT) Received: by mail-ua1-f50.google.com with SMTP id q68so9056580uaq.0 for ; Mon, 03 Aug 2020 11:09:30 -0700 (PDT) X-Received: by 2002:ab0:44e5:: with SMTP id n92mr12122918uan.121.1596478170242; Mon, 03 Aug 2020 11:09:30 -0700 (PDT) MIME-Version: 1.0 References: <1596305615-5894-1-git-send-email-tdas@codeaurora.org> <1596305615-5894-2-git-send-email-tdas@codeaurora.org> In-Reply-To: <1596305615-5894-2-git-send-email-tdas@codeaurora.org> From: Doug Anderson Date: Mon, 3 Aug 2020 11:09:18 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2] arm64: dts: qcom: sc7180: Add LPASS clock controller nodes To: Taniya Das Cc: Stephen Boyd , Michael Turquette , David Brown , Rajendra Nayak , linux-arm-msm , "open list:ARM/QUALCOMM SUPPORT" , linux-clk , LKML , Andy Gross , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Rob Herring , Rob Herring , Bjorn Andersson Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Sat, Aug 1, 2020 at 11:14 AM Taniya Das wrote: > > Update the clock controller nodes for Low power audio subsystem > functionality. > > Signed-off-by: Taniya Das > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index d46b383..7cf8bfe 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -8,6 +8,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -3312,6 +3313,30 @@ > qcom,msa-fixed-perm; > status = "disabled"; > }; > + > + lpasscc: clock-controller@62d00000 { > + compatible = "qcom,sc7180-lpasscorecc"; > + reg = <0 0x62d00000 0 0x50000>, > + <0 0x62780000 0 0x30000>; > + reg-names = "lpass_core_cc", "lpass_audio_cc"; > + clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, > + <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "iface", "bi_tcxo"; > + power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>; > + #clock-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > + lpass_hm: clock-controller@63000000 { > + compatible = "qcom,sc7180-lpasshm"; > + reg = <0 0x63000000 0 0x28>; > + clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, > + <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "iface", "bi_tcxo"; > + #clock-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > }; You end up adding a blank line at the end that Bjron can probably fix when applying, but other than that this looks good to me. Reviewed-by: Douglas Anderson