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[23.128.96.18]) by mx.google.com with ESMTP id a92si9455987edf.509.2020.08.04.08.42.55; Tue, 04 Aug 2020 08:43:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=esM63yMe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728631AbgHDPmN (ORCPT + 99 others); Tue, 4 Aug 2020 11:42:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40352 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726282AbgHDPmK (ORCPT ); Tue, 4 Aug 2020 11:42:10 -0400 Received: from mail-ed1-x544.google.com (mail-ed1-x544.google.com [IPv6:2a00:1450:4864:20::544]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 845D3C06174A; Tue, 4 Aug 2020 08:42:09 -0700 (PDT) Received: by mail-ed1-x544.google.com with SMTP id c2so24365495edx.8; Tue, 04 Aug 2020 08:42:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=G7TWxU3RrpRjJxbp4gq/13lUnFREHVtoNcL++CjhnMk=; b=esM63yMeDOa9kxDHU3HwnQXBgFY03PDyLbgTuKbQKFYMkCuVWb4LLj/+fynZ6g6SBJ 6eu0Gicqk0VlH6PeWt0sV+AYteVRl4mfmIxoOguGp0cCOHbbLI7xSAccIXgb6EixkACD 9fhBu2QD3Z5pvLxUo/rc/O/fk6jY0JJSN0Tmno+fvKhMLmopa90JY9q9q2xtAQeZpkUk bIP0Brgdb4cfxmQkxLjEzeEwoMO/PvHY1MKs7BXSI4hOjvTg9laFrzrbZ+iB/EUmkR3E qSn52LEWtVIsBQwRQK6RcIEwUvt1SLZPp6wX93ZVXJkVKhb1vPqXBeiEpT6COLeMMVQL kBBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=G7TWxU3RrpRjJxbp4gq/13lUnFREHVtoNcL++CjhnMk=; b=Y8qV0Np+ZrEDMRDEIgk8340ajfQMhnBMwTakPyNzTX5DBKnxTexQX7+8EC42ivpJOu Slx8/SbBPy9J5Rv5tR1rYX1a4FPd5by+Ap6TlZ0JMi1BsLyfDhU1vKOX5ToXydEPAyV+ aCQ5jlMbKJDwpvhcYPzP9RN6s4F7mk9VVSfUzETx6Wnd1Q2H1qXYsHrF3daivYB0rDkh PP+ztdSIU80JxN45d6lCtcxa5OyFmklyM/3C15mk3uU7Cyng86h09hfNyXO5OePe/sjM K+3L+ViG0/Q+gxHG+dIEsj27+ffU8HCz881CjuAIn8CiNyIrUdfUbNcodsaB6U8k3VSa LrOQ== X-Gm-Message-State: AOAM530dcTuCAZejI6MAYxbIdTwsLklIy4GOr9I752GPfjFfj0bUva1S D0PCHDpXHcKKXBlgL+gX29Pm/+w7Ge17b58egCA= X-Received: by 2002:a05:6402:1c10:: with SMTP id ck16mr20692925edb.151.1596555728124; Tue, 04 Aug 2020 08:42:08 -0700 (PDT) MIME-Version: 1.0 References: <1594899334-19772-1-git-send-email-kalyan_t@codeaurora.org> In-Reply-To: <1594899334-19772-1-git-send-email-kalyan_t@codeaurora.org> From: Rob Clark Date: Tue, 4 Aug 2020 08:42:52 -0700 Message-ID: Subject: Re: [PATCH 1/3] arm64: dts: sc7180: add interconnect bindings for display To: Kalyan Thota Cc: dri-devel , linux-arm-msm , freedreno , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Krishna Manikandan , Linux Kernel Mailing List , Sean Paul , "Kristian H. Kristensen" , Douglas Anderson , Jeykumar Sankaran , Raviteja Tamatam , nganji@codeaurora.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 16, 2020 at 4:36 AM Kalyan Thota wrote: > > From: Krishna Manikandan > > This change adds the interconnect bindings to the > MDSS node. This will establish Display to DDR path > for bus bandwidth voting. > > Changes in v2: > - Change in commit message(Matthias Kaehlcke) > > Changes in v3: > - Updated commit message to include > reviewer's name in v2 > > Signed-off-by: Krishna Manikandan Reviewed-by: Rob Clark > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 998f101..4f2c0d1 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -1522,6 +1522,9 @@ > interrupt-controller; > #interrupt-cells = <1>; > > + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; > + interconnect-names = "mdp0-mem"; > + > iommus = <&apps_smmu 0x800 0x2>; > > #address-cells = <2>; > -- > 1.9.1 >