Subject: Re: 2.6.15-rc1: IDE: fix potential data corruption with SL82C105
	interfaces
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Russell King <rmk+lkml@arm.linux.org.uk>, linux-ide@vger.kernel.org,
       linux-kernel@vger.kernel.org
In-Reply-To: <446890F0.3020408@ru.mvista.com>
References: <20051112165548.GB28987@flint.arm.linux.org.uk>
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	 <446890F0.3020408@ru.mvista.com>
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Date: Mon, 15 May 2006 16:25:16 +0100
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On Llu, 2006-05-15 at 18:32 +0400, Sergei Shtylyov wrote:
>     Heh, this driver also tries to cache the single PCI register per-channel 
> like hpt366.c... This buglet concerns using fast PIO timings and is probably 
> harmless though but needs to be fixed -- I'll send a patch soon...
>     I wonder what is otherwise wrong with using 2 channels concurrently?

I've not got any dual channel devices to test, and in fact I couldn't
find anyone with dual channel stuff at all. The caching is one bug, the
fact the reset hits both channels is the other I know about.

Otherwise the libata driver is fairly similar although the timing is
pre-computed from the documentation for the DMA modes.

Alan
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