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Subject: Re: [PATCH v5 4/4] clk: qcom: lpass: Add support for LPASS clock controller for SC7180
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     David Brown <david.brown@linaro.org>,
        Rajendra Nayak <rnayak@codeaurora.org>,
        linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        Andy Gross <agross@kernel.org>, devicetree@vger.kernel.org,
        robh@kernel.org, robh+dt@kernel.org,
        Taniya Das <tdas@codeaurora.org>
To:     Michael Turquette <mturquette@baylibre.com>,
        Taniya Das <tdas@codeaurora.org>
Date:   Wed, 05 Aug 2020 13:24:52 -0700
Message-ID: <159665909245.1360974.10366839079633595523@swboyd.mtv.corp.google.com>
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Sender: linux-kernel-owner@vger.kernel.org
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Quoting Taniya Das (2020-07-24 09:07:58)
> +
> +static struct clk_rcg2 core_clk_src =3D {
> +       .cmd_rcgr =3D 0x1d000,
> +       .mnd_width =3D 8,
> +       .hid_width =3D 5,
> +       .parent_map =3D lpass_core_cc_parent_map_2,
> +       .clkr.hw.init =3D &(struct clk_init_data){
> +               .name =3D "core_clk_src",

Any chance this can get a better name? Something with LPASS prefix?

> +               .parent_data =3D &(const struct clk_parent_data){
> +                       .fw_name =3D "bi_tcxo",
> +               },
> +               .num_parents =3D 1,
> +               .ops =3D &clk_rcg2_ops,
> +       },
> +};
> +
[...]
> +
> +static struct clk_branch lpass_audio_core_sysnoc_mport_core_clk =3D {
> +       .halt_reg =3D 0x23000,
> +       .halt_check =3D BRANCH_HALT,
> +       .hwcg_reg =3D 0x23000,
> +       .hwcg_bit =3D 1,
> +       .clkr =3D {
> +               .enable_reg =3D 0x23000,
> +               .enable_mask =3D BIT(0),
> +               .hw.init =3D &(struct clk_init_data){
> +                       .name =3D "lpass_audio_core_sysnoc_mport_core_clk=
",
> +                       .parent_data =3D &(const struct clk_parent_data){
> +                               .hw =3D &core_clk_src.clkr.hw,
> +                       },
> +                       .num_parents =3D 1,
> +                       .flags =3D CLK_SET_RATE_PARENT,
> +                       .ops =3D &clk_branch2_ops,
> +               },
> +       },
> +};
> +
> +static struct clk_regmap *lpass_core_cc_sc7180_clocks[] =3D {
> +       [EXT_MCLK0_CLK_SRC] =3D &ext_mclk0_clk_src.clkr,
> +       [LPAIF_PRI_CLK_SRC] =3D &lpaif_pri_clk_src.clkr,
> +       [LPAIF_SEC_CLK_SRC] =3D &lpaif_sec_clk_src.clkr,
> +       [CORE_CLK_SRC] =3D &core_clk_src.clkr,

And all of these, can they have LPASS_ prefix on the defines? Seems
like we're missing a namespace otherwise.

> +       [LPASS_AUDIO_CORE_EXT_MCLK0_CLK] =3D &lpass_audio_core_ext_mclk0_=
clk.clkr,
> +       [LPASS_AUDIO_CORE_LPAIF_PRI_IBIT_CLK] =3D
> +               &lpass_audio_core_lpaif_pri_ibit_clk.clkr,
> +       [LPASS_AUDIO_CORE_LPAIF_SEC_IBIT_CLK] =3D
> +               &lpass_audio_core_lpaif_sec_ibit_clk.clkr,
> +       [LPASS_AUDIO_CORE_SYSNOC_MPORT_CORE_CLK] =3D
> +               &lpass_audio_core_sysnoc_mport_core_clk.clkr,
> +       [LPASS_LPAAUDIO_DIG_PLL] =3D &lpass_lpaaudio_dig_pll.clkr,
> +       [LPASS_LPAAUDIO_DIG_PLL_OUT_ODD] =3D &lpass_lpaaudio_dig_pll_out_=
odd.clkr,
> +};
> +