Received: by 2002:a05:6a10:a0d1:0:0:0:0 with SMTP id j17csp1156736pxa;
        Thu, 6 Aug 2020 00:35:00 -0700 (PDT)
X-Google-Smtp-Source: ABdhPJz8zMScxs8DTSn2RiRijdaXxYowi/kgLFurz3FK5dcg4KcsJux5NBcw/ThHkChQgwwFO/dM
X-Received: by 2002:a50:9d88:: with SMTP id w8mr2787220ede.122.1596699299941;
        Thu, 06 Aug 2020 00:34:59 -0700 (PDT)
ARC-Seal: i=1; a=rsa-sha256; t=1596699299; cv=none;
        d=google.com; s=arc-20160816;
        b=eWc39m18k/yuUUtHYezTsv0Vo9LixxwUqBXu8EozMRKOJBF+QtHhnEyF7SaVOFxUQ5
         Am6NMm6dvTwoZDbGGMSNk/mcGcs1x2RfQhzsG8W8E9RRCNDHTS4S1+6UEGkzAYXx5YJy
         eyQw1dDHqtpo5g/JkLMOBB43PEuIshOyVu3IhIGuGevjTfBDSW+2Qd+qt2GempzF911A
         8sjsAht7Ik9s3Ht5vT1mEKQ3UYi+Es9RQgkWWO4X3u40hgbH21cCHoydT/kVQNYqWETy
         eG5ZRkLtAt4CRqs5ub/Di+Zt1x4J0rH0dBXqJP/pGADIEhtIyRKQlUjtDBHe57k2boKC
         jLQw==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:dkim-signature:mime-version:references
         :in-reply-to:message-id:date:subject:cc:to:from;
        bh=bhLBojTFXOgiLqqKv69qFtYQJyCZHygwLjpojlupOrc=;
        b=kHhgYCUBPKrN3NSL6JI06ycRh6lb1B8ObhlVwEhZS01KIAwA/yYnP+Ce5jW1Mee61J
         b2A7weCfyrgKtH3h7PWayXn6QsqY7oyO6UseRQ6G4s5+5+1VcHTWjin2yqTSCqMGtZV+
         kUK0g/pVyOrSnk6GyxS+WvKNR547Lj8fCls4rXY2SysVlteo8tekl4lepjHmvQgo4PCr
         KRUfFU863Az2w0KtxOfDCoeeAr1N1J1Cwg2oYFEwfMgdt0yUG6UbqvnL0oFPNNKLB0qc
         OMNVFq3BQPmzrGv8xnrbyw0toe2bnbGtNlCgFSXiFA09h/L/gQ/fU3LTvN+1jHdEvqqa
         /IwQ==
ARC-Authentication-Results: i=1; mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=pasqh1jn;
       spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18])
        by mx.google.com with ESMTP id l15si2639226edr.130.2020.08.06.00.34.37;
        Thu, 06 Aug 2020 00:34:59 -0700 (PDT)
Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Authentication-Results: mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=pasqh1jn;
       spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1728835AbgHFHbe (ORCPT <rfc822;alexzyp@gmail.com> + 99 others);
        Thu, 6 Aug 2020 03:31:34 -0400
Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:7835 "EHLO
        hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1728714AbgHFHah (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Thu, 6 Aug 2020 03:30:37 -0400
Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA)
        id <B5f2bb1690000>; Thu, 06 Aug 2020 00:29:45 -0700
Received: from hqmail.nvidia.com ([172.20.161.6])
  by hqpgpgate101.nvidia.com (PGP Universal service);
  Thu, 06 Aug 2020 00:30:35 -0700
X-PGP-Universal: processed;
        by hqpgpgate101.nvidia.com on Thu, 06 Aug 2020 00:30:35 -0700
Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL101.nvidia.com
 (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 6 Aug
 2020 07:30:31 +0000
Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL105.nvidia.com
 (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend
 Transport; Thu, 6 Aug 2020 07:30:31 +0000
Received: from rgumasta-linux.nvidia.com (Not Verified[10.19.66.108]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121)
        id <B5f2bb1940000>; Thu, 06 Aug 2020 00:30:31 -0700
From:   Rajesh Gumasta <rgumasta@nvidia.com>
To:     <ldewangan@nvidia.com>, <jonathanh@nvidia.com>, <vkoul@kernel.org>,
        <dan.j.williams@intel.com>, <thierry.reding@gmail.com>,
        <p.zabel@pengutronix.de>, <dmaengine@vger.kernel.org>,
        <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>
CC:     <kyarlagadda@nvidia.com>, <rgumasta@nvidia.com>
Subject: [Patch v2 3/4] arm64: configs: enable tegra gpc dma
Date:   Thu, 6 Aug 2020 13:00:05 +0530
Message-ID: <1596699006-9934-4-git-send-email-rgumasta@nvidia.com>
X-Mailer: git-send-email 2.7.4
In-Reply-To: <1596699006-9934-1-git-send-email-rgumasta@nvidia.com>
References: <1596699006-9934-1-git-send-email-rgumasta@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
        t=1596698985; bh=bhLBojTFXOgiLqqKv69qFtYQJyCZHygwLjpojlupOrc=;
        h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer:
         In-Reply-To:References:X-NVConfidentiality:MIME-Version:
         Content-Type;
        b=pasqh1jnp3vNX360Qyd8fLgLjAMgIdkybdPEWS3LgYohQao/CgS46vVLi2K/zIa1u
         GsjMLfuWtG0PdmKxw+dhq44MTS/Gfm8id+4TlenjFIJ6iG59OKoaaXyOkvB1vLPUrx
         1Dr5hPtblsuTOrz9WykSuyfuHOIxhh61re4cEyLpXs+z7vyJxeKJn4qZM9/ocQD1BJ
         I3LENnzOPMVouwPavHstT7kB+VMtZ60ho/qxOOObRUU0uEAyGWuCACStZSdlo9I6kw
         eups/kapnO16L/M5r6tqVM17s3P6xqrx4NOW2PNxmRB9xp2pf8Tywz5rUodIg3wMfj
         8r+vLWRQr0Z0A==
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Enable TEGRA_GPC_DMA in defconfig for Tegra186 and Tegra196 gpc
dma controller driver

Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 883e8ba..600f568 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -775,6 +775,7 @@ CONFIG_MV_XOR_V2=y
 CONFIG_OWL_DMA=y
 CONFIG_PL330_DMA=y
 CONFIG_TEGRA20_APB_DMA=y
+CONFIG_TEGRA_GPC_DMA=m
 CONFIG_QCOM_BAM_DMA=y
 CONFIG_QCOM_HIDMA_MGMT=y
 CONFIG_QCOM_HIDMA=y
-- 
2.7.4