Received: by 2002:a05:6a10:a0d1:0:0:0:0 with SMTP id j17csp1632369pxa; Thu, 6 Aug 2020 12:02:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxkJvMvFzukSrGWJh2GNnFPU3TdQNvGmDRrUOf+tQREispxrBjQm9LwdtAC+NJVUNu6ekqI X-Received: by 2002:a17:907:4064:: with SMTP id nl4mr5749089ejb.342.1596740578399; Thu, 06 Aug 2020 12:02:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1596740578; cv=none; d=google.com; s=arc-20160816; b=WkFe4x9P7eBnTObNCqaE2vt8tE/WvfaI0UnucRnDo6iIm7by6VILKArYEAnc/fRlZ6 rb1lUFerHbeSanhIjFCps3K8v3OfjRYv1zKnVQlDRBWnuPITQq+9Sirp4wOddgjauKrV vAYD3sMX+sDMCBhjTfAwL8sbZeBiads6jPf4FOAwd2WLMwGp0em2qYGR33ueVbMzojAM TdfQSz6oqZfFdL/LAmsD+RI0SdWq5iDVY/FLG1fDgls5oAuc+n7TbRzV5agNE7uC+/sJ rceb/BOc0pLWpB3EldhqyFSv+YIsTajEdtVpSoa804Yzv23ZtTfcLid3bDtk28rWYc7J 9SuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:dkim-signature:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from; bh=5U56MbpoGgbizDY87xBQZF5BWeIIcAyUuev+l62V8Co=; b=mTAyxyWX8yFiVUqtMzQMNrDyOSKQTkLo520aNZsnb7qdA9vD7ibNngKP9L3XIAmebx YGxRIRdDvGsde8ootrTJor2G4CEYK0MG1h8OwfgR0E2ksMtkytH4TFzCy88XbLkjCi07 fgABu5fSoTeo6W6CDwHEfwPPrhfJQfiFyVdeUmVJ0MwW6YROunsLag+lGibuDNXHQHsw m9K2LNiDqteNqPvadGXalMrD1VnY5KX6C1nhoVYRjB9lzM6uLiYJWMHYOBRQ2pjaGTKs jrZT8WHjOdBK9UmeQNDU+Gr8SsDUk5uW6uCVRo3EPx2GE9hsMGhgAXOzW/7nNbaQZy1U tHAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=cEQf+DCG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c12si3797871ejz.120.2020.08.06.12.02.29; Thu, 06 Aug 2020 12:02:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=cEQf+DCG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729562AbgHFTB7 (ORCPT + 99 others); Thu, 6 Aug 2020 15:01:59 -0400 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:14653 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728507AbgHFTBj (ORCPT ); Thu, 6 Aug 2020 15:01:39 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 06 Aug 2020 12:00:47 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 06 Aug 2020 12:01:37 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 06 Aug 2020 12:01:37 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 6 Aug 2020 19:01:37 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Thu, 6 Aug 2020 19:01:37 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.172.190]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Thu, 06 Aug 2020 12:01:36 -0700 From: Sowjanya Komatineni To: , , , , , , , CC: , , , , , Subject: [PATCH v9 03/10] media: tegra-video: Update format lookup to offset based Date: Thu, 6 Aug 2020 12:01:27 -0700 Message-ID: <1596740494-19306-4-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1596740494-19306-1-git-send-email-skomatineni@nvidia.com> References: <1596740494-19306-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1596740447; bh=5U56MbpoGgbizDY87xBQZF5BWeIIcAyUuev+l62V8Co=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=cEQf+DCGF1Y6u2lRk1nLMRrOwBxxLsb6NaEttr4kWxiXiPmIff1Si6AOhh/XZePeo SrN8K6goD9fOAQu0/rNFfjTd4o8wUaGMrZfERtlR4XDq6ujHGAId8GOhmy7pPe7EN3 nlVHYg1aCrEnGSeM2FCBC1CcwHCHUaJgJd6pcVRqrq7u/BV99133gJ23xdjdbxl4DD iWkQzUy9cmskGdmBOSvWtzE9KPftnVpejoWJhmrNOt8MMW/N6o6ylNzdCcRqYB0Fkn F7vRNelQ5xM5XExuM9QJrmDE7p44AE+Wizuf7oli8uYT7i3czl2ZLC/EtvPE3rn7H3 /kHjVe+YA3Paw== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Tegra VI supported video formats are more for non TPG and there can be multiple pixel formats for the same media bus format. This patch updates the helper function for format lookup based on mbus code from pre-defined Tegra supported format list to look from the specified list index offset. Offset based look up is used with sensor device graph (non TPG) where format enumeration can list all supported formats for the specific sensor mbus codes. Signed-off-by: Sowjanya Komatineni --- drivers/staging/media/tegra-video/vi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 0197f4e..52d751f 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -53,11 +53,12 @@ to_tegra_channel_buffer(struct vb2_v4l2_buffer *vb) } static int tegra_get_format_idx_by_code(struct tegra_vi *vi, - unsigned int code) + unsigned int code, + unsigned int offset) { unsigned int i; - for (i = 0; i < vi->soc->nformats; ++i) { + for (i = offset; i < vi->soc->nformats; ++i) { if (vi->soc->video_formats[i].code == code) return i; } @@ -598,11 +599,12 @@ static void vi_tpg_fmts_bitmap_init(struct tegra_vi_channel *chan) bitmap_zero(chan->tpg_fmts_bitmap, MAX_FORMAT_NUM); index = tegra_get_format_idx_by_code(chan->vi, - MEDIA_BUS_FMT_SRGGB10_1X10); + MEDIA_BUS_FMT_SRGGB10_1X10, 0); bitmap_set(chan->tpg_fmts_bitmap, index, 1); index = tegra_get_format_idx_by_code(chan->vi, - MEDIA_BUS_FMT_RGB888_1X32_PADHI); + MEDIA_BUS_FMT_RGB888_1X32_PADHI, + 0); bitmap_set(chan->tpg_fmts_bitmap, index, 1); } -- 2.7.4