To: ralphc@pathscale.com
Cc: linux-kernel@vger.kernel.org, openib-general@openib.org
Subject: Re: [openib-general] Re: [PATCH 53 of 53] ipath - add memory  barrier when waiting for writes
References: <f8ebb8c1e43635081b73.1147477418@eng-12.pathscale.com>
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	<1147727447.2773.14.camel@chalcedony.pathscale.com>
	<60844.71.131.57.117.1147734080.squirrel@rocky.pathscale.com>
	<ada64k6sx7w.fsf@cisco.com>
	<40771.71.131.57.117.1147735500.squirrel@rocky.pathscale.com>
	<adaslnarhpv.fsf@cisco.com>
	<53739.71.131.57.117.1147736281.squirrel@rocky.pathscale.com>
From: Roland Dreier <rdreier@cisco.com>
Date: Mon, 15 May 2006 16:47:41 -0700
In-Reply-To: <53739.71.131.57.117.1147736281.squirrel@rocky.pathscale.com> (ralphc@pathscale.com's message of "Mon, 15 May 2006 16:38:01 -0700 (PDT)")
Message-ID: <adafyjargte.fsf@cisco.com>
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    ralphc> I didn't try calling barrier() so I don't know the answer.
    ralphc> When power is restored, I can try it.  My guess is that
    ralphc> it's a timing issue and not a code reordering issue.

Hmm, then we really better understand what's going on, because
otherwise you're just going to have trouble again if someone makes a
CPU with a faster mfence instruction...
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