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Subject: Re: [PATCH v5 4/4] clk: qcom: lpass: Add support for LPASS clock controller for SC7180
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     David Brown <david.brown@linaro.org>,
        Rajendra Nayak <rnayak@codeaurora.org>,
        linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        Andy Gross <agross@kernel.org>, devicetree@vger.kernel.org,
        robh@kernel.org, robh+dt@kernel.org
To:     Michael Turquette <mturquette@baylibre.com>,
        Taniya Das <tdas@codeaurora.org>
Date:   Fri, 07 Aug 2020 14:42:43 -0700
Message-ID: <159683656359.1360974.18078513144154056292@swboyd.mtv.corp.google.com>
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Quoting Taniya Das (2020-08-05 22:23:05)
> On 8/6/2020 1:54 AM, Stephen Boyd wrote:
> >> +                               .hw =3D &core_clk_src.clkr.hw,
> >> +                       },
> >> +                       .num_parents =3D 1,
> >> +                       .flags =3D CLK_SET_RATE_PARENT,
> >> +                       .ops =3D &clk_branch2_ops,
> >> +               },
> >> +       },
> >> +};
> >> +
> >> +static struct clk_regmap *lpass_core_cc_sc7180_clocks[] =3D {
> >> +       [EXT_MCLK0_CLK_SRC] =3D &ext_mclk0_clk_src.clkr,
> >> +       [LPAIF_PRI_CLK_SRC] =3D &lpaif_pri_clk_src.clkr,
> >> +       [LPAIF_SEC_CLK_SRC] =3D &lpaif_sec_clk_src.clkr,
> >> +       [CORE_CLK_SRC] =3D &core_clk_src.clkr,
> >=20
> > And all of these, can they have LPASS_ prefix on the defines? Seems
> > like we're missing a namespace otherwise.
> >=20
>=20
> These are generated as they are in the HW plan. Do you still think I=20
> should update them?
>=20

As long as there aren't going to be conflicts in the clk names I guess
it's OK to do nothing here.