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[23.128.96.18]) by mx.google.com with ESMTP id ov32si8812988ejb.218.2020.08.08.18.11.51; Sat, 08 Aug 2020 18:12:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=j3ycVpAK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726382AbgHIBI6 (ORCPT + 99 others); Sat, 8 Aug 2020 21:08:58 -0400 Received: from mail.kernel.org ([198.145.29.99]:46016 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726040AbgHIBI5 (ORCPT ); Sat, 8 Aug 2020 21:08:57 -0400 Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 408C120716; Sun, 9 Aug 2020 01:08:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1596935337; bh=eqq7sVY8BRS8obJcxE/XbjiiZrd9saTF1MqNPfw36BM=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=j3ycVpAK+U2RAxmk8LW1Cm4sWW/Dd9s3TyWPyq4VS0zdIUaZ+FtAwQ/ut5Dbvd46Z 4SicMmRxX+ahR9u5GQPPSWj1yVQ8LO8U/aVZjPpSb7EEViz9zYf1wHawG+9T0TFvEm eBZgQjGig5PXmey8AKQwA+Etvnivf2RmrKLM3hBA= Received: by mail-ej1-f45.google.com with SMTP id c16so5880085ejx.12; Sat, 08 Aug 2020 18:08:57 -0700 (PDT) X-Gm-Message-State: AOAM532XIMOl1+ulkGuFqD6IZ9tEcnjavSQCQaz9NoIT8xoaWG1G6GMY nkfBDtoD9N9dOS3Qa3+sDYNQZ4E6Rb17bM99RA== X-Received: by 2002:a17:906:7492:: with SMTP id e18mr15505191ejl.375.1596935335797; Sat, 08 Aug 2020 18:08:55 -0700 (PDT) MIME-Version: 1.0 References: <1596855231-5782-1-git-send-email-yongqiang.niu@mediatek.com> <1596855231-5782-2-git-send-email-yongqiang.niu@mediatek.com> In-Reply-To: From: Chun-Kuang Hu Date: Sun, 9 Aug 2020 09:08:44 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RESEND v7, PATCH 1/7] dt-bindings: mediatek: add rdma_fifo_size description for mt8183 display To: Chun-Kuang Hu Cc: Yongqiang Niu , CK Hu , Philipp Zabel , Rob Herring , Matthias Brugger , Mark Rutland , devicetree@vger.kernel.org, David Airlie , linux-kernel , DRI Development , "moderated list:ARM/Mediatek SoC support" , Daniel Vetter , Linux ARM Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Yongqiang: Chun-Kuang Hu =E6=96=BC 2020=E5=B9=B48=E6=9C=889= =E6=97=A5 =E9=80=B1=E6=97=A5 =E4=B8=8A=E5=8D=888:56=E5=AF=AB=E9=81=93=EF=BC= =9A > > Hi, Yongqiang: > > Yongqiang Niu =E6=96=BC 2020=E5=B9=B48=E6=9C= =888=E6=97=A5 =E9=80=B1=E5=85=AD =E4=B8=8A=E5=8D=8811:04=E5=AF=AB=E9=81=93= =EF=BC=9A > > > > rdma fifo size may be different even in same SOC, add this > > property to the corresponding rdma > > > > Change-Id: I67635ec7f3f59cf4cbc7737285e5e28ff0ab71c9 > > Remove change-id. > > > Signed-off-by: Yongqiang Niu > > --- > > .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 14 ++++++= ++++++++ > > 1 file changed, 14 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediate= k,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,di= sp.txt > > index b91e709..e6bbe32 100644 > > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.= txt > > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.= txt > > @@ -66,6 +66,11 @@ Required properties (DMA function blocks): > > argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu= .txt > > for details. > > > > +Optional properties (RDMA function blocks): > > +- mediatek,rdma_fifo_size: rdma fifo size may be different even in sam= e SOC, add this > > + property to the corresponding rdma > > + the value is the Max value which defined in hardware data sheet. > > + > > Examples: > > > > mmsys: clock-controller@14000000 { > > @@ -207,3 +212,12 @@ od@14023000 { > > power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; > > clocks =3D <&mmsys CLK_MM_DISP_OD>; > > }; > > + > > +rdma1: rdma@1400c000 { > > + compatible =3D "mediatek,mt8183-disp-rdma"; > > + reg =3D <0 0x1400c000 0 0x1000>; > > + interrupts =3D ; > > + power-domains =3D <&scpsys MT8183_POWER_DOMAIN_DISP>; > > + clocks =3D <&mmsys CLK_MM_DISP_RDMA1>; > > + mediatek,rdma_fifo_size =3D <2048>; > > +}; > > I would like you to show rdma0 as well so that could prove two rdma > have different fifo size in the same SoC. Sorry, rdma0 is already define in this file. Just ignore this comment. Regards, Chun-Kuang. > > Regards, > Chun-Kuang. > > > -- > > 1.8.1.1.dirty > > _______________________________________________ > > Linux-mediatek mailing list > > Linux-mediatek@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-mediatek