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Date:   Sun, 9 Aug 2020 11:11:00 +0100
From:   Catalin Marinas <catalin.marinas@arm.com>
To:     Guenter Roeck <linux@roeck-us.net>
Cc:     Sumit Gupta <sumitg@nvidia.com>, rjw@rjwysocki.net,
        viresh.kumar@linaro.org, will@kernel.org, thierry.reding@gmail.com,
        robh+dt@kernel.org, mirq-linux@rere.qmqm.pl,
        devicetree@vger.kernel.org, jonathanh@nvidia.com, talho@nvidia.com,
        linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        bbasu@nvidia.com, mperttunen@nvidia.com
Subject: Re: [TEGRA194_CPUFREQ PATCH v6 3/3] cpufreq: Add Tegra194 cpufreq
 driver
Message-ID: <20200809101059.GA22286@gaia>
References: <1594819885-31016-1-git-send-email-sumitg@nvidia.com>
 <1594819885-31016-4-git-send-email-sumitg@nvidia.com>
 <20200809004009.GA96704@roeck-us.net>
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On Sat, Aug 08, 2020 at 05:40:09PM -0700, Guenter Roeck wrote:
> On Wed, Jul 15, 2020 at 07:01:25PM +0530, Sumit Gupta wrote:
> > Add support for CPU frequency scaling on Tegra194. The frequency
> > of each core can be adjusted by writing a clock divisor value to
> > a MSR on the core. The range of valid divisors is queried from
> > the BPMP.
> > 
> > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> > Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
> 
> If built as module:
> 
> ERROR: modpost: "__cpu_logical_map" [drivers/cpufreq/tegra194-cpufreq.ko] undefined!

The exporting of this arm64 symbol went in last night.

-- 
Catalin