Received: by 2002:a05:6a10:a0d1:0:0:0:0 with SMTP id j17csp4271798pxa; Mon, 10 Aug 2020 05:32:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz5Tbr2z+dx6Hu5+z2lWb1+DbfWsBdJLD7jp/JmByCBftkOSpucVCO0Ux6yOxAOoL5/BuYU X-Received: by 2002:a17:907:72c8:: with SMTP id du8mr20707443ejc.237.1597062750025; Mon, 10 Aug 2020 05:32:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1597062750; cv=none; d=google.com; s=arc-20160816; b=pqSAgC9EgW9dI++LFUQM+868qZHE2owi5mpyzeIGzhPy+u3AIobOomQiMCmBQjfZlp BLWqIalP9q0xeDqvgNZ/fuon6jicUCYLVjA07cgQoyN29mA5ENd4NvmUTj4yTso5s7ku wogfE5+owcavGxM7ripKlzxiGRYzBRWUtv3z6mLrQrpYAO0Sj/i0szaYk55DTdx5eWgE ugZHqGaUKbNqGR3BCyac/7uuA60T09sD2nze1vyBx9XRlWP3LEIHXz5KU8+LIzLVwCVj ofrriyK1wBUSb304VunqVX1iw/36Y4OCj3jA9ypR5enrUXzmVweepM5jHB5ztNk/pH+Y MwtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=GsdhtLvJrfq/GBnJC1vgqOGKIKFQcqYncoVYjT+7v8M=; b=e2sF1AyPxuWzYHhgrcKPa4nuEGDdBzE7X1mpZH1fc23qWGcsraMqdKUa+5DkIAzTxm QUC04NlP5Q6+4quL7mEaP0YiW8TAlkjaIsSHfvZGqJajm2jzQEey8lVuU0Vmwvm7YZA4 OyUXiJSzSPcyioIKlyCRc/lH34wV8px3wfHQHP1XjqNRulncBYhmvkJyA5e4VB86Q9+D LFzoax6mONiF0R+TjRDPHUGccuvHD0sjZCFztwVz8CYHxe6qn8xHNK39iwwkaZFFVoSA NRJXs/5FYfucKBzf7nIxAtiufaI10MU72MRxUPMmD3B7yAZ+puLkOftnVGsyOgG9JRI4 lD0A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d23si9689849edp.84.2020.08.10.05.32.07; Mon, 10 Aug 2020 05:32:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726595AbgHJM3f (ORCPT + 99 others); Mon, 10 Aug 2020 08:29:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726141AbgHJM3f (ORCPT ); Mon, 10 Aug 2020 08:29:35 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0462C061756; Mon, 10 Aug 2020 05:29:34 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: gtucker) with ESMTPSA id 3839228F8D9 Subject: Re: [PATCH 3/3] ARM: exynos: use DT prefetch attributes rather than l2c_aux_val To: Krzysztof Kozlowski Cc: Russell King , Kukjin Kim , Rob Herring , kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org References: <860eb8a1eed879e55daf960c96acdac514cbda93.1596028601.git.guillaume.tucker@collabora.com> <5e41140ddb1afe42699715cca59c44fa2fa29e60.1596028601.git.guillaume.tucker@collabora.com> <20200803131147.GA476@kozik-lap> From: Guillaume Tucker Message-ID: <5a68730d-f082-a096-38eb-eaadbbc462b2@collabora.com> Date: Mon, 10 Aug 2020 13:29:28 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200803131147.GA476@kozik-lap> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/08/2020 14:13, Krzysztof Kozlowski wrote: > On Wed, Jul 29, 2020 at 02:47:33PM +0100, Guillaume Tucker wrote: >> Use the standard l2c2x0 device tree bindings to enable data and >> instruction prefetch on exynos4210 and exynos4412 and clear the >> respective bits in the default l2c_aux_val. No other Exynos platform >> relying on this default register value appears to be using the l2x0 >> cache. >> >> Signed-off-by: Guillaume Tucker >> --- >> arch/arm/boot/dts/exynos4210.dtsi | 2 ++ >> arch/arm/boot/dts/exynos4412.dtsi | 2 ++ >> arch/arm/mach-exynos/exynos.c | 4 ++-- > > I will need these split between DTS and mach changes. Of course, sorry. Fixed in v2. Thanks, Guillaume