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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id f3sm24471837pfj.206.2020.08.10.13.14.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Aug 2020 13:14:32 -0700 (PDT) Date: Mon, 10 Aug 2020 14:14:30 -0600 From: Mathieu Poirier To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mike.leach@linaro.org, coresight@lists.linaro.org, robh+dt@kernel.org, devicetree@vger.kernel.org Subject: Re: [RFC PATCH 14/14] dts: bindings: coresight: ETMv4.4 system register access only units Message-ID: <20200810201430.GC3223977@xps15> References: <20200722172040.1299289-1-suzuki.poulose@arm.com> <20200722172040.1299289-15-suzuki.poulose@arm.com> <20200729172058.GA3060370@xps15> <7036b8c5-b920-3de7-21d0-474e759e2624@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7036b8c5-b920-3de7-21d0-474e759e2624@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 30, 2020 at 05:38:37PM +0100, Suzuki K Poulose wrote: > On 07/29/2020 06:20 PM, Mathieu Poirier wrote: > > On Wed, Jul 22, 2020 at 06:20:40PM +0100, Suzuki K Poulose wrote: > > > Document the bindings for ETMv4.4 and later with only system register > > > access. > > > > > > Cc: Rob Herring > > > Cc: devicetree@vger.kernel.org > > > Cc: Mathieu Poirier > > > Cc: Mike Leach > > > Signed-off-by: Suzuki K Poulose > > > --- > > > Documentation/devicetree/bindings/arm/coresight.txt | 6 +++++- > > > 1 file changed, 5 insertions(+), 1 deletion(-) > > > > > > diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt > > > index d711676b4a51..cfe47bdda728 100644 > > > --- a/Documentation/devicetree/bindings/arm/coresight.txt > > > +++ b/Documentation/devicetree/bindings/arm/coresight.txt > > > @@ -34,9 +34,13 @@ its hardware characteristcs. > > > Program Flow Trace Macrocell: > > > "arm,coresight-etm3x", "arm,primecell"; > > > - - Embedded Trace Macrocell (version 4.x): > > > + - Embedded Trace Macrocell (version 4.x), with memory mapped access. > > > "arm,coresight-etm4x", "arm,primecell"; > > > + - Embedded Trace Macrocell (version 4.4 and later) with system > > > + register access only. > > > + "arm,coresight-etm-v4.4"; > > > > I would rather call this "arm,coresight-etm-v4.4+" so that the binding's > > semantic is still relevant when dealing with ETM v4.5 and onward. > > AFAIUC, "compatible" stands for something that is compatible with v4.4. > All v4.4+ versions that are compatible with v4.4 are covered here. Your position is valid - let's to with what you had. > Having said that I am fine with "arm,coresight-etm-v4.4+" , if it > is fine by the DT conventions. > > Cheers > Suzuki