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From:   Damien Le Moal <Damien.LeMoal@wdc.com>
To:     Qiu Wenbo <qiuwenbo@phytium.com.cn>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        "linux-riscv@lists.infradead.org" <linux-riscv@lists.infradead.org>
CC:     Albert Ou <aou@eecs.berkeley.edu>,
        Atish Patra <Atish.Patra@wdc.com>,
        Anup Patel <anup@brainfault.org>,
        Guo Ren <guoren@linux.alibaba.com>,
        Zong Li <zong.li@sifive.com>,
        Greentime Hu <greentime.hu@sifive.com>,
        Vincent Chen <vincent.chen@sifive.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] riscv: Setup exception vector for K210 properly
Thread-Topic: [PATCH] riscv: Setup exception vector for K210 properly
Thread-Index: AQHWb6n+97W98+gJfk6zRY9oCnz7uQ==
Date:   Tue, 11 Aug 2020 06:43:31 +0000
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References: <20200811063659.284088-1-qiuwenbo@phytium.com.cn>
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On 2020/08/11 15:38, Qiu Wenbo wrote:=0A=
> Exception vector is missing on nommu platform and it is a big issue.=0A=
> This patch is tested in Sipeed MAIX Bit Dev Board.=0A=
> =0A=
> Fixes: 79b1feba5455 ("RISC-V: Setup exception vector early")=0A=
=0A=
I think this needs a "Cc: stable@vger.kernel.org #5.8" too.=0A=
=0A=
> Signed-off-by: Qiu Wenbo <qiuwenbo@phytium.com.cn>=0A=
> ---=0A=
>  arch/riscv/kernel/smpboot.c |  1 +=0A=
>  arch/riscv/kernel/traps.c   | 11 ++++++++++-=0A=
>  2 files changed, 11 insertions(+), 1 deletion(-)=0A=
> =0A=
> diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c=0A=
> index 356825a57551..23cde0ceb39d 100644=0A=
> --- a/arch/riscv/kernel/smpboot.c=0A=
> +++ b/arch/riscv/kernel/smpboot.c=0A=
> @@ -154,6 +154,7 @@ asmlinkage __visible void smp_callin(void)=0A=
>  	mmgrab(mm);=0A=
>  	current->active_mm =3D mm;=0A=
>  =0A=
> +	trap_init();=0A=
>  	notify_cpu_starting(curr_cpuid);=0A=
>  	update_siblings_masks(curr_cpuid);=0A=
>  	set_cpu_online(curr_cpuid, 1);=0A=
> diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c=0A=
> index ad14f4466d92..a390239818ae 100644=0A=
> --- a/arch/riscv/kernel/traps.c=0A=
> +++ b/arch/riscv/kernel/traps.c=0A=
> @@ -174,7 +174,16 @@ int is_valid_bugaddr(unsigned long pc)=0A=
>  }=0A=
>  #endif /* CONFIG_GENERIC_BUG */=0A=
>  =0A=
> -/* stvec & scratch is already set from head.S */=0A=
> +/* stvec & scratch is already set from head.S when mmu is enabled */=0A=
>  void trap_init(void)=0A=
>  {=0A=
> +#ifndef CONFIG_MMU=0A=
> +	/*=0A=
> +	 * Set sup0 scratch register to 0, indicating to exception vector=0A=
> +	 * that we are presently executing in the kernel=0A=
> +	 */=0A=
> +	csr_write(CSR_SCRATCH, 0);=0A=
> +	/* Set the exception vector address */=0A=
> +	csr_write(CSR_TVEC, &handle_exception);=0A=
> +#endif=0A=
>  }=0A=
> =0A=
=0A=
=0A=
-- =0A=
Damien Le Moal=0A=
Western Digital Research=0A=