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[23.128.96.18]) by mx.google.com with ESMTP id j8si12610297ejy.610.2020.08.11.09.57.42; Tue, 11 Aug 2020 09:58:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729063AbgHKQym (ORCPT + 99 others); Tue, 11 Aug 2020 12:54:42 -0400 Received: from mga12.intel.com ([192.55.52.136]:26275 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728962AbgHKQym (ORCPT ); Tue, 11 Aug 2020 12:54:42 -0400 IronPort-SDR: SXyN+1518Zs/4UK2pM6sjLiVJ879785iGvkq2hcphgBq3kkefsqs8Ur8MW0VIiCD1nOLFSpphO Os6sa+eupjmw== X-IronPort-AV: E=McAfee;i="6000,8403,9710"; a="133307073" X-IronPort-AV: E=Sophos;i="5.76,301,1592895600"; d="scan'208";a="133307073" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2020 09:54:41 -0700 IronPort-SDR: R+rgW4VXEi6GPdVsNSPPelRJdde1YATjsp7hTZyCXnQW5hDkJKLhGtxzcFZx76HOtN6UvBV43J NaFi2AsXBeTA== X-IronPort-AV: E=Sophos;i="5.76,301,1592895600"; d="scan'208";a="495211140" Received: from lwhitehe-mobl.amr.corp.intel.com (HELO [10.212.97.49]) ([10.212.97.49]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2020 09:54:39 -0700 Subject: Re: [PATCH v3 2/2] ASoC: Intel: Add period size constraint on strago board To: Mark Brown , Yu-Hsuan Hsu Cc: Guennadi Liakhovetski , "alsa-devel@alsa-project.org" , Kai Vehmanen , Kuninori Morimoto , Takashi Iwai , "Rojewski, Cezary" , Takashi Iwai , Jie Yang , "linux-kernel@vger.kernel.org" , Liam Girdwood , Sam McNally , "yuhsuan@google.com" , Ranjani Sridharan , Daniel Stuart , Andy Shevchenko , "Lu, Brent" , Damian van Soelen References: <6466847a-8aae-24f7-d727-36ba75e95f98@linux.intel.com> <3f3baf5e-f73d-9cd6-cbfb-36746071e126@linux.intel.com> <20200811145353.GG6967@sirena.org.uk> From: Pierre-Louis Bossart Message-ID: Date: Tue, 11 Aug 2020 11:54:38 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200811145353.GG6967@sirena.org.uk> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >>> ... Why only 240? That's the next logical question. >>> If you have a clarification for it, it may be the rigid reason to >>> introduce such a hw constraint. > >> According to Brent, the DSP is using 240 period regardless the >> hw_param. If the period size is 256, DSP will read 256 samples each >> time but only consume 240 samples until the ring buffer of DSP is >> full. This behavior makes the samples in the ring buffer of kernel >> consumed quickly. > >> Not sure whether the explanation is correct. Hi Brent, can you confirm it? > > This seems to be going round and round in circles. Userspace lets the > kernel pick the period size, if the period size isn't 240 (or a multiple > of it?) the DSP doesn't properly pay attention to that apparently due to > internal hard coding in the DSP firmware which we can't change so the > constraint logic needs to know about this DSP limitation - it seems like > none of this is going to change without something new going into the > mix? We at least need a new question to ask about the DSP firmware I > think. I just tested aplay -Dhw: on a Cyan Chromebook with the Ubuntu kernel 5.4, and I see no issues with the 240 sample period. Same with 432, 960, 9600, etc. I also tried just for fun what happens with 256 samples, and I don't see any underflows thrown either, so I am wondering what exactly the problem is? Something's not adding up. I would definitively favor multiple of 1ms periods, since it's the only case that was productized, but there's got to me something a side effect of how CRAS programs the hw_params. root@chrx:~# aplay -Dhw:0,0 --period-size=240 --buffer-size=480 -v 1.wav Playing WAVE '1.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo Hardware PCM card 0 'chtmax98090' device 0 subdevice 0 Its setup is: stream : PLAYBACK access : RW_INTERLEAVED format : S16_LE subformat : STD channels : 2 rate : 48000 exact rate : 48000 (48000/1) msbits : 16 buffer_size : 480 period_size : 240 period_time : 5000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 240 period_event : 0 start_threshold : 480 stop_threshold : 480 silence_threshold: 0 silence_size : 0 boundary : 8646911284551352320 appl_ptr : 0 hw_ptr : 0 root@chrx:~# aplay -Dhw:0,0 --period-size=256 --buffer-size=512 -v 1.wav Playing WAVE '1.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo Hardware PCM card 0 'chtmax98090' device 0 subdevice 0 Its setup is: stream : PLAYBACK access : RW_INTERLEAVED format : S16_LE subformat : STD channels : 2 rate : 48000 exact rate : 48000 (48000/1) msbits : 16 buffer_size : 512 period_size : 256 period_time : 5333 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 256 period_event : 0 start_threshold : 512 stop_threshold : 512 silence_threshold: 0 silence_size : 0 boundary : 4611686018427387904 appl_ptr : 0 hw_ptr : 0